mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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f9a705ad1c
- New page table code for both hypervisor and guest stage-2 - Introduction of a new EL2-private host context - Allow EL2 to have its own private per-CPU variables - Support of PMU event filtering - Complete rework of the Spectre mitigation PPC: - Fix for running nested guests with in-kernel IRQ chip - Fix race condition causing occasional host hard lockup - Minor cleanups and bugfixes x86: - allow trapping unknown MSRs to userspace - allow userspace to force #GP on specific MSRs - INVPCID support on AMD - nested AMD cleanup, on demand allocation of nested SVM state - hide PV MSRs and hypercalls for features not enabled in CPUID - new test for MSR_IA32_TSC writes from host and guest - cleanups: MMU, CPUID, shared MSRs - LAPIC latency optimizations ad bugfixes For x86, also included in this pull request is a new alternative and (in the future) more scalable implementation of extended page tables that does not need a reverse map from guest physical addresses to host physical addresses. For now it is disabled by default because it is still lacking a few of the existing MMU's bells and whistles. However it is a very solid piece of work and it is already available for people to hammer on it. -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAl+S8dsUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroM40Af+M46NJmuS5rcwFfybvK/c42KT6svX Co1NrZDwzSQ2mMy3WQzH9qeLvb+nbY4sT3n5BPNPNsT+aIDPOTDt//qJ2/Ip9UUs tRNea0MAR96JWLE7MSeeRxnTaQIrw/AAZC0RXFzZvxcgytXwdqBExugw4im+b+dn Dcz8QxX1EkwT+4lTm5HC0hKZAuo4apnK1QkqCq4SdD2QVJ1YE6+z7pgj4wX7xitr STKD6q/Yt/0ndwqS0GSGbyg0jy6mE620SN6isFRkJYwqfwLJci6KnqvEK67EcNMu qeE017K+d93yIVC46/6TfVHzLR/D1FpQ8LZ16Yl6S13OuGIfAWBkQZtPRg== =AD6a -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull KVM updates from Paolo Bonzini: "For x86, there is a new alternative and (in the future) more scalable implementation of extended page tables that does not need a reverse map from guest physical addresses to host physical addresses. For now it is disabled by default because it is still lacking a few of the existing MMU's bells and whistles. However it is a very solid piece of work and it is already available for people to hammer on it. Other updates: ARM: - New page table code for both hypervisor and guest stage-2 - Introduction of a new EL2-private host context - Allow EL2 to have its own private per-CPU variables - Support of PMU event filtering - Complete rework of the Spectre mitigation PPC: - Fix for running nested guests with in-kernel IRQ chip - Fix race condition causing occasional host hard lockup - Minor cleanups and bugfixes x86: - allow trapping unknown MSRs to userspace - allow userspace to force #GP on specific MSRs - INVPCID support on AMD - nested AMD cleanup, on demand allocation of nested SVM state - hide PV MSRs and hypercalls for features not enabled in CPUID - new test for MSR_IA32_TSC writes from host and guest - cleanups: MMU, CPUID, shared MSRs - LAPIC latency optimizations ad bugfixes" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (232 commits) kvm: x86/mmu: NX largepage recovery for TDP MMU kvm: x86/mmu: Don't clear write flooding count for direct roots kvm: x86/mmu: Support MMIO in the TDP MMU kvm: x86/mmu: Support write protection for nesting in tdp MMU kvm: x86/mmu: Support disabling dirty logging for the tdp MMU kvm: x86/mmu: Support dirty logging for the TDP MMU kvm: x86/mmu: Support changed pte notifier in tdp MMU kvm: x86/mmu: Add access tracking for tdp_mmu kvm: x86/mmu: Support invalidate range MMU notifier for TDP MMU kvm: x86/mmu: Allocate struct kvm_mmu_pages for all pages in TDP MMU kvm: x86/mmu: Add TDP MMU PF handler kvm: x86/mmu: Remove disallowed_hugepage_adjust shadow_walk_iterator arg kvm: x86/mmu: Support zapping SPTEs in the TDP MMU KVM: Cache as_id in kvm_memory_slot kvm: x86/mmu: Add functions to handle changed TDP SPTEs kvm: x86/mmu: Allocate and free TDP MMU roots kvm: x86/mmu: Init / Uninit the TDP MMU kvm: x86/mmu: Introduce tdp_iter KVM: mmu: extract spte.h and spte.c KVM: mmu: Separate updating a PTE from kvm_set_pte_rmapp ...
194 lines
7.4 KiB
C
194 lines
7.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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#ifndef _UAPI__SVM_H
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#define _UAPI__SVM_H
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#define SVM_EXIT_READ_CR0 0x000
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#define SVM_EXIT_READ_CR2 0x002
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#define SVM_EXIT_READ_CR3 0x003
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#define SVM_EXIT_READ_CR4 0x004
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#define SVM_EXIT_READ_CR8 0x008
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#define SVM_EXIT_WRITE_CR0 0x010
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#define SVM_EXIT_WRITE_CR2 0x012
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#define SVM_EXIT_WRITE_CR3 0x013
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#define SVM_EXIT_WRITE_CR4 0x014
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#define SVM_EXIT_WRITE_CR8 0x018
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#define SVM_EXIT_READ_DR0 0x020
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#define SVM_EXIT_READ_DR1 0x021
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#define SVM_EXIT_READ_DR2 0x022
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#define SVM_EXIT_READ_DR3 0x023
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#define SVM_EXIT_READ_DR4 0x024
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#define SVM_EXIT_READ_DR5 0x025
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#define SVM_EXIT_READ_DR6 0x026
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#define SVM_EXIT_READ_DR7 0x027
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#define SVM_EXIT_WRITE_DR0 0x030
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#define SVM_EXIT_WRITE_DR1 0x031
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#define SVM_EXIT_WRITE_DR2 0x032
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#define SVM_EXIT_WRITE_DR3 0x033
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#define SVM_EXIT_WRITE_DR4 0x034
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#define SVM_EXIT_WRITE_DR5 0x035
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#define SVM_EXIT_WRITE_DR6 0x036
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#define SVM_EXIT_WRITE_DR7 0x037
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#define SVM_EXIT_EXCP_BASE 0x040
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#define SVM_EXIT_LAST_EXCP 0x05f
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#define SVM_EXIT_INTR 0x060
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#define SVM_EXIT_NMI 0x061
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#define SVM_EXIT_SMI 0x062
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#define SVM_EXIT_INIT 0x063
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#define SVM_EXIT_VINTR 0x064
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#define SVM_EXIT_CR0_SEL_WRITE 0x065
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#define SVM_EXIT_IDTR_READ 0x066
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#define SVM_EXIT_GDTR_READ 0x067
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#define SVM_EXIT_LDTR_READ 0x068
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#define SVM_EXIT_TR_READ 0x069
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#define SVM_EXIT_IDTR_WRITE 0x06a
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#define SVM_EXIT_GDTR_WRITE 0x06b
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#define SVM_EXIT_LDTR_WRITE 0x06c
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#define SVM_EXIT_TR_WRITE 0x06d
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#define SVM_EXIT_RDTSC 0x06e
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#define SVM_EXIT_RDPMC 0x06f
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#define SVM_EXIT_PUSHF 0x070
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#define SVM_EXIT_POPF 0x071
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#define SVM_EXIT_CPUID 0x072
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#define SVM_EXIT_RSM 0x073
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#define SVM_EXIT_IRET 0x074
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#define SVM_EXIT_SWINT 0x075
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#define SVM_EXIT_INVD 0x076
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#define SVM_EXIT_PAUSE 0x077
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#define SVM_EXIT_HLT 0x078
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#define SVM_EXIT_INVLPG 0x079
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#define SVM_EXIT_INVLPGA 0x07a
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#define SVM_EXIT_IOIO 0x07b
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#define SVM_EXIT_MSR 0x07c
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#define SVM_EXIT_TASK_SWITCH 0x07d
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#define SVM_EXIT_FERR_FREEZE 0x07e
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#define SVM_EXIT_SHUTDOWN 0x07f
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#define SVM_EXIT_VMRUN 0x080
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#define SVM_EXIT_VMMCALL 0x081
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#define SVM_EXIT_VMLOAD 0x082
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#define SVM_EXIT_VMSAVE 0x083
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#define SVM_EXIT_STGI 0x084
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#define SVM_EXIT_CLGI 0x085
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#define SVM_EXIT_SKINIT 0x086
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#define SVM_EXIT_RDTSCP 0x087
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#define SVM_EXIT_ICEBP 0x088
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#define SVM_EXIT_WBINVD 0x089
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#define SVM_EXIT_MONITOR 0x08a
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#define SVM_EXIT_MWAIT 0x08b
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#define SVM_EXIT_MWAIT_COND 0x08c
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#define SVM_EXIT_XSETBV 0x08d
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#define SVM_EXIT_RDPRU 0x08e
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#define SVM_EXIT_INVPCID 0x0a2
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#define SVM_EXIT_NPF 0x400
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#define SVM_EXIT_AVIC_INCOMPLETE_IPI 0x401
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#define SVM_EXIT_AVIC_UNACCELERATED_ACCESS 0x402
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/* SEV-ES software-defined VMGEXIT events */
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#define SVM_VMGEXIT_MMIO_READ 0x80000001
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#define SVM_VMGEXIT_MMIO_WRITE 0x80000002
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#define SVM_VMGEXIT_NMI_COMPLETE 0x80000003
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#define SVM_VMGEXIT_AP_HLT_LOOP 0x80000004
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#define SVM_VMGEXIT_AP_JUMP_TABLE 0x80000005
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#define SVM_VMGEXIT_SET_AP_JUMP_TABLE 0
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#define SVM_VMGEXIT_GET_AP_JUMP_TABLE 1
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#define SVM_VMGEXIT_UNSUPPORTED_EVENT 0x8000ffff
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#define SVM_EXIT_ERR -1
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#define SVM_EXIT_REASONS \
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{ SVM_EXIT_READ_CR0, "read_cr0" }, \
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{ SVM_EXIT_READ_CR2, "read_cr2" }, \
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{ SVM_EXIT_READ_CR3, "read_cr3" }, \
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{ SVM_EXIT_READ_CR4, "read_cr4" }, \
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{ SVM_EXIT_READ_CR8, "read_cr8" }, \
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{ SVM_EXIT_WRITE_CR0, "write_cr0" }, \
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{ SVM_EXIT_WRITE_CR2, "write_cr2" }, \
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{ SVM_EXIT_WRITE_CR3, "write_cr3" }, \
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{ SVM_EXIT_WRITE_CR4, "write_cr4" }, \
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{ SVM_EXIT_WRITE_CR8, "write_cr8" }, \
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{ SVM_EXIT_READ_DR0, "read_dr0" }, \
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{ SVM_EXIT_READ_DR1, "read_dr1" }, \
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{ SVM_EXIT_READ_DR2, "read_dr2" }, \
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{ SVM_EXIT_READ_DR3, "read_dr3" }, \
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{ SVM_EXIT_READ_DR4, "read_dr4" }, \
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{ SVM_EXIT_READ_DR5, "read_dr5" }, \
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{ SVM_EXIT_READ_DR6, "read_dr6" }, \
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{ SVM_EXIT_READ_DR7, "read_dr7" }, \
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{ SVM_EXIT_WRITE_DR0, "write_dr0" }, \
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{ SVM_EXIT_WRITE_DR1, "write_dr1" }, \
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{ SVM_EXIT_WRITE_DR2, "write_dr2" }, \
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{ SVM_EXIT_WRITE_DR3, "write_dr3" }, \
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{ SVM_EXIT_WRITE_DR4, "write_dr4" }, \
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{ SVM_EXIT_WRITE_DR5, "write_dr5" }, \
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{ SVM_EXIT_WRITE_DR6, "write_dr6" }, \
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{ SVM_EXIT_WRITE_DR7, "write_dr7" }, \
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{ SVM_EXIT_EXCP_BASE + DE_VECTOR, "DE excp" }, \
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{ SVM_EXIT_EXCP_BASE + DB_VECTOR, "DB excp" }, \
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{ SVM_EXIT_EXCP_BASE + BP_VECTOR, "BP excp" }, \
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{ SVM_EXIT_EXCP_BASE + OF_VECTOR, "OF excp" }, \
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{ SVM_EXIT_EXCP_BASE + BR_VECTOR, "BR excp" }, \
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{ SVM_EXIT_EXCP_BASE + UD_VECTOR, "UD excp" }, \
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{ SVM_EXIT_EXCP_BASE + NM_VECTOR, "NM excp" }, \
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{ SVM_EXIT_EXCP_BASE + DF_VECTOR, "DF excp" }, \
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{ SVM_EXIT_EXCP_BASE + TS_VECTOR, "TS excp" }, \
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{ SVM_EXIT_EXCP_BASE + NP_VECTOR, "NP excp" }, \
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{ SVM_EXIT_EXCP_BASE + SS_VECTOR, "SS excp" }, \
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{ SVM_EXIT_EXCP_BASE + GP_VECTOR, "GP excp" }, \
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{ SVM_EXIT_EXCP_BASE + PF_VECTOR, "PF excp" }, \
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{ SVM_EXIT_EXCP_BASE + MF_VECTOR, "MF excp" }, \
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{ SVM_EXIT_EXCP_BASE + AC_VECTOR, "AC excp" }, \
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{ SVM_EXIT_EXCP_BASE + MC_VECTOR, "MC excp" }, \
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{ SVM_EXIT_EXCP_BASE + XM_VECTOR, "XF excp" }, \
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{ SVM_EXIT_INTR, "interrupt" }, \
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{ SVM_EXIT_NMI, "nmi" }, \
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{ SVM_EXIT_SMI, "smi" }, \
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{ SVM_EXIT_INIT, "init" }, \
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{ SVM_EXIT_VINTR, "vintr" }, \
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{ SVM_EXIT_CR0_SEL_WRITE, "cr0_sel_write" }, \
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{ SVM_EXIT_IDTR_READ, "read_idtr" }, \
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{ SVM_EXIT_GDTR_READ, "read_gdtr" }, \
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{ SVM_EXIT_LDTR_READ, "read_ldtr" }, \
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{ SVM_EXIT_TR_READ, "read_rt" }, \
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{ SVM_EXIT_IDTR_WRITE, "write_idtr" }, \
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{ SVM_EXIT_GDTR_WRITE, "write_gdtr" }, \
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{ SVM_EXIT_LDTR_WRITE, "write_ldtr" }, \
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{ SVM_EXIT_TR_WRITE, "write_rt" }, \
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{ SVM_EXIT_RDTSC, "rdtsc" }, \
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{ SVM_EXIT_RDPMC, "rdpmc" }, \
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{ SVM_EXIT_PUSHF, "pushf" }, \
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{ SVM_EXIT_POPF, "popf" }, \
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{ SVM_EXIT_CPUID, "cpuid" }, \
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{ SVM_EXIT_RSM, "rsm" }, \
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{ SVM_EXIT_IRET, "iret" }, \
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{ SVM_EXIT_SWINT, "swint" }, \
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{ SVM_EXIT_INVD, "invd" }, \
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{ SVM_EXIT_PAUSE, "pause" }, \
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{ SVM_EXIT_HLT, "hlt" }, \
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{ SVM_EXIT_INVLPG, "invlpg" }, \
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{ SVM_EXIT_INVLPGA, "invlpga" }, \
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{ SVM_EXIT_IOIO, "io" }, \
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{ SVM_EXIT_MSR, "msr" }, \
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{ SVM_EXIT_TASK_SWITCH, "task_switch" }, \
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{ SVM_EXIT_FERR_FREEZE, "ferr_freeze" }, \
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{ SVM_EXIT_SHUTDOWN, "shutdown" }, \
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{ SVM_EXIT_VMRUN, "vmrun" }, \
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{ SVM_EXIT_VMMCALL, "hypercall" }, \
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{ SVM_EXIT_VMLOAD, "vmload" }, \
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{ SVM_EXIT_VMSAVE, "vmsave" }, \
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{ SVM_EXIT_STGI, "stgi" }, \
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{ SVM_EXIT_CLGI, "clgi" }, \
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{ SVM_EXIT_SKINIT, "skinit" }, \
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{ SVM_EXIT_RDTSCP, "rdtscp" }, \
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{ SVM_EXIT_ICEBP, "icebp" }, \
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{ SVM_EXIT_WBINVD, "wbinvd" }, \
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{ SVM_EXIT_MONITOR, "monitor" }, \
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{ SVM_EXIT_MWAIT, "mwait" }, \
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{ SVM_EXIT_XSETBV, "xsetbv" }, \
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{ SVM_EXIT_INVPCID, "invpcid" }, \
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{ SVM_EXIT_NPF, "npf" }, \
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{ SVM_EXIT_AVIC_INCOMPLETE_IPI, "avic_incomplete_ipi" }, \
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{ SVM_EXIT_AVIC_UNACCELERATED_ACCESS, "avic_unaccelerated_access" }, \
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{ SVM_EXIT_ERR, "invalid_guest_state" }
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#endif /* _UAPI__SVM_H */
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