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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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729cac693e
Changed existing two descriptor-chain flow to one chain. In two-chain implementation BNA interrupt used for switching between two chains. BNA interrupt asserted because of returning to beginning of the chain based on L-bit of last descriptor. Because of that we lose packets. This issue resolved by using one desc-chain. Removed all staff related to two desc-chain flow from DDMA ISOC related functions. Removed request length checking from dwc2_gadget_fill_isoc_desc() function. Request length checking added to dwc2_hsotg_ep_queue() function. If request length greater than descriptor limits then request not added to queue. Additional checking done for High Bandwidth ISOC OUT's which not supported by driver. In dwc2_gadget_fill_isoc_desc() function also checked desc-chain status (full or not) to avoid of reusing not yet processed descriptors. In dwc2_gadget_start_isoc_ddma() function creation of desc-chain always started from descriptor 0. Before filling descriptors, they were initialized by HOST BUSY status. In dwc2_gadget_complete_isoc_request_ddma() added checking for desc-chain rollover. Also added checking completion status. Request completed successfully if DEV_DMA_STS is DEV_DMA_STS_SUCC, otherwise complete with actual=0. For systems with high IRQ latency added pointer compl_desc to next descriptor to be completed by XferCompl interrupt. This pointer replace descriptor index calculation based on DxEPDMA register. On descriptor completion interrupt processing all descriptors starting from compl_desc till descriptor which Buffer Status field not equal DMA_DONE status. Actually removed dwc2_gadget_start_next_isoc_ddma() function because now driver use only one desc-chain and instead that function added dwc2_gadget_handle_isoc_bna() function for handling BNA interrupts. Handling BNA interrupt done by flushing TxFIFOs for OUT EPs, completing request with actual=0 and resetting desc-chain number and target frame to initial values for restarting transfers. On handling NAK request completed with actual=0. Incremented target frame to allow fill desc chain and start transfers. In DDMA mode avoided of frame number incrementing, because tracking of frame number performed in dwc2_gadget_fill_isoc_desc() function. When core assert XferCompl along with BNA, we should ignore XferCompl in dwc2_hsotg_epint() function. On BNA interrupt replaced dwc2_gadget_start_next_isoc_ddma() by above mentioned BNA handler. In dwc2_hsotg_ep_enable() function added sanity check of bInterval for ISOC IN in DDMA mode, because HW doesn't supported EP's with bInterval more than 10 and check for mc for ISOC OUT transfers, because core doesn't support high bandwidth transfers. Signed-off-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> |
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| .. | ||
| core_intr.c | ||
| core.c | ||
| core.h | ||
| debug.h | ||
| debugfs.c | ||
| gadget.c | ||
| hcd_ddma.c | ||
| hcd_intr.c | ||
| hcd_queue.c | ||
| hcd.c | ||
| hcd.h | ||
| hw.h | ||
| Kconfig | ||
| Makefile | ||
| params.c | ||
| pci.c | ||
| platform.c | ||