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72826b9f88
Default arch_idle() isn't good enough for OMAP4 because of aync bridge errata and necessity of NOPs post WFI to avoid speculative prefetch aborts. Hence Use OMAP4 custom omap_do_wfi() hook for default idle. Later in the series, async bridge errata work-around patch updates the omap_do_wfi() with necessary interconnects barriers. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
203 lines
4.6 KiB
C
203 lines
4.6 KiB
C
/*
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* OMAP4 Power Management Routines
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*
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* Copyright (C) 2010 Texas Instruments, Inc.
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* Rajendra Nayak <rnayak@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/pm.h>
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#include <linux/suspend.h>
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#include <linux/module.h>
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#include <linux/list.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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#include "common.h"
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#include "clockdomain.h"
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#include "powerdomain.h"
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struct power_state {
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struct powerdomain *pwrdm;
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u32 next_state;
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#ifdef CONFIG_SUSPEND
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u32 saved_state;
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#endif
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struct list_head node;
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};
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static LIST_HEAD(pwrst_list);
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#ifdef CONFIG_SUSPEND
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static int omap4_pm_suspend(void)
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{
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do_wfi();
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return 0;
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}
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static int omap4_pm_enter(suspend_state_t suspend_state)
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{
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int ret = 0;
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switch (suspend_state) {
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case PM_SUSPEND_STANDBY:
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case PM_SUSPEND_MEM:
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ret = omap4_pm_suspend();
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break;
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default:
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ret = -EINVAL;
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}
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return ret;
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}
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static int omap4_pm_begin(suspend_state_t state)
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{
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disable_hlt();
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return 0;
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}
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static void omap4_pm_end(void)
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{
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enable_hlt();
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return;
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}
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static const struct platform_suspend_ops omap_pm_ops = {
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.begin = omap4_pm_begin,
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.end = omap4_pm_end,
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.enter = omap4_pm_enter,
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.valid = suspend_valid_only_mem,
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};
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#endif /* CONFIG_SUSPEND */
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/*
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* Enable hardware supervised mode for all clockdomains if it's
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* supported. Initiate sleep transition for other clockdomains, if
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* they are not used
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*/
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static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
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{
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if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
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clkdm_allow_idle(clkdm);
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else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
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atomic_read(&clkdm->usecount) == 0)
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clkdm_sleep(clkdm);
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return 0;
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}
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static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
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{
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struct power_state *pwrst;
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if (!pwrdm->pwrsts)
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return 0;
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pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC);
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if (!pwrst)
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return -ENOMEM;
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pwrst->pwrdm = pwrdm;
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pwrst->next_state = PWRDM_POWER_ON;
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list_add(&pwrst->node, &pwrst_list);
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return pwrdm_set_next_pwrst(pwrst->pwrdm, pwrst->next_state);
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}
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/**
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* omap_default_idle - OMAP4 default ilde routine.'
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*
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* Implements OMAP4 memory, IO ordering requirements which can't be addressed
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* with default arch_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and
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* by secondary CPU with CONFIG_CPUIDLE.
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*/
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static void omap_default_idle(void)
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{
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local_irq_disable();
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local_fiq_disable();
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omap_do_wfi();
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local_fiq_enable();
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local_irq_enable();
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}
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/**
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* omap4_pm_init - Init routine for OMAP4 PM
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*
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* Initializes all powerdomain and clockdomain target states
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* and all PRCM settings.
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*/
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static int __init omap4_pm_init(void)
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{
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int ret;
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struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm;
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struct clockdomain *ducati_clkdm, *l3_2_clkdm, *l4_per_clkdm;
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if (!cpu_is_omap44xx())
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return -ENODEV;
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if (omap_rev() == OMAP4430_REV_ES1_0) {
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WARN(1, "Power Management not supported on OMAP4430 ES1.0\n");
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return -ENODEV;
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}
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pr_err("Power Management for TI OMAP4.\n");
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ret = pwrdm_for_each(pwrdms_setup, NULL);
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if (ret) {
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pr_err("Failed to setup powerdomains\n");
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goto err2;
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}
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/*
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* The dynamic dependency between MPUSS -> MEMIF and
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* MPUSS -> L4_PER/L3_* and DUCATI -> L3_* doesn't work as
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* expected. The hardware recommendation is to enable static
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* dependencies for these to avoid system lock ups or random crashes.
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*/
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mpuss_clkdm = clkdm_lookup("mpuss_clkdm");
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emif_clkdm = clkdm_lookup("l3_emif_clkdm");
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l3_1_clkdm = clkdm_lookup("l3_1_clkdm");
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l3_2_clkdm = clkdm_lookup("l3_2_clkdm");
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l4_per_clkdm = clkdm_lookup("l4_per_clkdm");
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ducati_clkdm = clkdm_lookup("ducati_clkdm");
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if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) ||
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(!l3_2_clkdm) || (!ducati_clkdm) || (!l4_per_clkdm))
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goto err2;
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ret = clkdm_add_wkdep(mpuss_clkdm, emif_clkdm);
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ret |= clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm);
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ret |= clkdm_add_wkdep(mpuss_clkdm, l3_2_clkdm);
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ret |= clkdm_add_wkdep(mpuss_clkdm, l4_per_clkdm);
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ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm);
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ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm);
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if (ret) {
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pr_err("Failed to add MPUSS -> L3/EMIF/L4PER, DUCATI -> L3 "
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"wakeup dependency\n");
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goto err2;
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}
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ret = omap4_mpuss_init();
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if (ret) {
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pr_err("Failed to initialise OMAP4 MPUSS\n");
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goto err2;
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}
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(void) clkdm_for_each(clkdms_setup, NULL);
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#ifdef CONFIG_SUSPEND
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suspend_set_ops(&omap_pm_ops);
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#endif /* CONFIG_SUSPEND */
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/* Overwrite the default arch_idle() */
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pm_idle = omap_default_idle;
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err2:
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return ret;
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}
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late_initcall(omap4_pm_init);
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