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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7261aafc09
OPALv2 only ever existed in the lab and didn't escape to the world. All OPAL systems in the wild are OPALv3. The probability of there being an OPALv2 system still powered on anywhere inside IBM is approximately zero, let alone anyone expecting to run mainline kernels. So, start to remove references to OPALv2. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
324 lines
6.9 KiB
C
324 lines
6.9 KiB
C
/*
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* PowerNV setup code.
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*
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* Copyright 2011 IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#undef DEBUG
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#include <linux/cpu.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/tty.h>
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#include <linux/reboot.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/seq_file.h>
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#include <linux/of.h>
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#include <linux/of_fdt.h>
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#include <linux/interrupt.h>
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#include <linux/bug.h>
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#include <linux/pci.h>
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#include <linux/cpufreq.h>
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#include <asm/machdep.h>
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#include <asm/firmware.h>
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#include <asm/xics.h>
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#include <asm/opal.h>
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#include <asm/kexec.h>
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#include <asm/smp.h>
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#include "powernv.h"
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static void __init pnv_setup_arch(void)
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{
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set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
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/* Initialize SMP */
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pnv_smp_init();
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/* Setup PCI */
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pnv_pci_init();
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/* Setup RTC and NVRAM callbacks */
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if (firmware_has_feature(FW_FEATURE_OPAL))
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opal_nvram_init();
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/* Enable NAP mode */
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powersave_nap = 1;
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/* XXX PMCS */
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}
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static void __init pnv_init_early(void)
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{
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/*
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* Initialize the LPC bus now so that legacy serial
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* ports can be found on it
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*/
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opal_lpc_init();
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#ifdef CONFIG_HVC_OPAL
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if (firmware_has_feature(FW_FEATURE_OPAL))
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hvc_opal_init_early();
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else
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#endif
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add_preferred_console("hvc", 0, NULL);
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}
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static void __init pnv_init_IRQ(void)
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{
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xics_init();
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WARN_ON(!ppc_md.get_irq);
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}
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static void pnv_show_cpuinfo(struct seq_file *m)
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{
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struct device_node *root;
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const char *model = "";
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root = of_find_node_by_path("/");
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if (root)
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model = of_get_property(root, "model", NULL);
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seq_printf(m, "machine\t\t: PowerNV %s\n", model);
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if (firmware_has_feature(FW_FEATURE_OPALv3))
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seq_printf(m, "firmware\t: OPAL v3\n");
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else
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seq_printf(m, "firmware\t: BML\n");
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of_node_put(root);
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}
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static void pnv_prepare_going_down(void)
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{
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/*
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* Disable all notifiers from OPAL, we can't
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* service interrupts anymore anyway
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*/
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opal_event_shutdown();
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/* Soft disable interrupts */
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local_irq_disable();
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/*
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* Return secondary CPUs to firwmare if a flash update
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* is pending otherwise we will get all sort of error
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* messages about CPU being stuck etc.. This will also
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* have the side effect of hard disabling interrupts so
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* past this point, the kernel is effectively dead.
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*/
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opal_flash_term_callback();
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}
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static void __noreturn pnv_restart(char *cmd)
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{
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long rc = OPAL_BUSY;
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pnv_prepare_going_down();
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while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
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rc = opal_cec_reboot();
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if (rc == OPAL_BUSY_EVENT)
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opal_poll_events(NULL);
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else
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mdelay(10);
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}
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for (;;)
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opal_poll_events(NULL);
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}
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static void __noreturn pnv_power_off(void)
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{
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long rc = OPAL_BUSY;
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pnv_prepare_going_down();
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while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
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rc = opal_cec_power_down(0);
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if (rc == OPAL_BUSY_EVENT)
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opal_poll_events(NULL);
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else
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mdelay(10);
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}
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for (;;)
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opal_poll_events(NULL);
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}
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static void __noreturn pnv_halt(void)
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{
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pnv_power_off();
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}
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static void pnv_progress(char *s, unsigned short hex)
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{
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}
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static void pnv_shutdown(void)
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{
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/* Let the PCI code clear up IODA tables */
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pnv_pci_shutdown();
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/*
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* Stop OPAL activity: Unregister all OPAL interrupts so they
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* don't fire up while we kexec and make sure all potentially
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* DMA'ing ops are complete (such as dump retrieval).
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*/
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opal_shutdown();
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}
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#ifdef CONFIG_KEXEC
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static void pnv_kexec_wait_secondaries_down(void)
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{
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int my_cpu, i, notified = -1;
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my_cpu = get_cpu();
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for_each_online_cpu(i) {
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uint8_t status;
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int64_t rc, timeout = 1000;
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if (i == my_cpu)
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continue;
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for (;;) {
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rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
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&status);
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if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
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break;
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barrier();
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if (i != notified) {
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printk(KERN_INFO "kexec: waiting for cpu %d "
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"(physical %d) to enter OPAL\n",
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i, paca[i].hw_cpu_id);
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notified = i;
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}
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/*
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* On crash secondaries might be unreachable or hung,
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* so timeout if we've waited too long
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* */
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mdelay(1);
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if (timeout-- == 0) {
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printk(KERN_ERR "kexec: timed out waiting for "
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"cpu %d (physical %d) to enter OPAL\n",
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i, paca[i].hw_cpu_id);
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break;
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}
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}
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}
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}
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static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
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{
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xics_kexec_teardown_cpu(secondary);
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/* On OPAL v3, we return all CPUs to firmware */
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if (!firmware_has_feature(FW_FEATURE_OPALv3))
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return;
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if (secondary) {
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/* Return secondary CPUs to firmware on OPAL v3 */
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mb();
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get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
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mb();
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/* Return the CPU to OPAL */
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opal_return_cpu();
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} else {
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/* Primary waits for the secondaries to have reached OPAL */
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pnv_kexec_wait_secondaries_down();
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/*
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* We might be running as little-endian - now that interrupts
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* are disabled, reset the HILE bit to big-endian so we don't
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* take interrupts in the wrong endian later
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*/
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opal_reinit_cpus(OPAL_REINIT_CPUS_HILE_BE);
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}
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}
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#endif /* CONFIG_KEXEC */
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#ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
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static unsigned long pnv_memory_block_size(void)
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{
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return 256UL * 1024 * 1024;
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}
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#endif
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static void __init pnv_setup_machdep_opal(void)
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{
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ppc_md.get_boot_time = opal_get_boot_time;
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ppc_md.restart = pnv_restart;
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pm_power_off = pnv_power_off;
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ppc_md.halt = pnv_halt;
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ppc_md.machine_check_exception = opal_machine_check;
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ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
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ppc_md.hmi_exception_early = opal_hmi_exception_early;
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ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
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}
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static int __init pnv_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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if (!of_flat_dt_is_compatible(root, "ibm,powernv"))
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return 0;
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hpte_init_native();
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if (firmware_has_feature(FW_FEATURE_OPAL))
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pnv_setup_machdep_opal();
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pr_debug("PowerNV detected !\n");
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return 1;
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}
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/*
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* Returns the cpu frequency for 'cpu' in Hz. This is used by
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* /proc/cpuinfo
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*/
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static unsigned long pnv_get_proc_freq(unsigned int cpu)
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{
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unsigned long ret_freq;
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ret_freq = cpufreq_quick_get(cpu) * 1000ul;
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/*
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* If the backend cpufreq driver does not exist,
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* then fallback to old way of reporting the clockrate.
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*/
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if (!ret_freq)
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ret_freq = ppc_proc_freq;
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return ret_freq;
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}
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define_machine(powernv) {
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.name = "PowerNV",
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.probe = pnv_probe,
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.init_early = pnv_init_early,
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.setup_arch = pnv_setup_arch,
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.init_IRQ = pnv_init_IRQ,
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.show_cpuinfo = pnv_show_cpuinfo,
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.get_proc_freq = pnv_get_proc_freq,
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.progress = pnv_progress,
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.machine_shutdown = pnv_shutdown,
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.power_save = power7_idle,
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.calibrate_decr = generic_calibrate_decr,
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#ifdef CONFIG_KEXEC
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.kexec_cpu_down = pnv_kexec_cpu_down,
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#endif
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#ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
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.memory_block_size = pnv_memory_block_size,
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#endif
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};
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