mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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1fbf46280e
Add support for the optional 'phy-clkgate-delay-us' property that is used to describe the delay time between putting PHY into low power mode and turning off the PHY clock. Signed-off-by: Li Jun <jun.li@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Peter Chen <peter.chen@freescale.com>
88 lines
2.5 KiB
C
88 lines
2.5 KiB
C
/*
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* Platform data for the chipidea USB dual role controller
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*/
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#ifndef __LINUX_USB_CHIPIDEA_H
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#define __LINUX_USB_CHIPIDEA_H
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#include <linux/extcon.h>
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#include <linux/usb/otg.h>
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struct ci_hdrc;
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/**
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* struct ci_hdrc_cable - structure for external connector cable state tracking
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* @state: current state of the line
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* @changed: set to true when extcon event happen
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* @edev: device which generate events
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* @ci: driver state of the chipidea device
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* @nb: hold event notification callback
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* @conn: used for notification registration
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*/
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struct ci_hdrc_cable {
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bool state;
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bool changed;
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struct extcon_dev *edev;
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struct ci_hdrc *ci;
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struct notifier_block nb;
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};
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struct ci_hdrc_platform_data {
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const char *name;
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/* offset of the capability registers */
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uintptr_t capoffset;
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unsigned power_budget;
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struct phy *phy;
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/* old usb_phy interface */
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struct usb_phy *usb_phy;
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enum usb_phy_interface phy_mode;
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unsigned long flags;
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#define CI_HDRC_REGS_SHARED BIT(0)
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#define CI_HDRC_DISABLE_DEVICE_STREAMING BIT(1)
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#define CI_HDRC_SUPPORTS_RUNTIME_PM BIT(2)
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#define CI_HDRC_DISABLE_HOST_STREAMING BIT(3)
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#define CI_HDRC_DISABLE_STREAMING (CI_HDRC_DISABLE_DEVICE_STREAMING | \
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CI_HDRC_DISABLE_HOST_STREAMING)
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/*
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* Only set it when DCCPARAMS.DC==1 and DCCPARAMS.HC==1,
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* but otg is not supported (no register otgsc).
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*/
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#define CI_HDRC_DUAL_ROLE_NOT_OTG BIT(4)
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#define CI_HDRC_IMX28_WRITE_FIX BIT(5)
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#define CI_HDRC_FORCE_FULLSPEED BIT(6)
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#define CI_HDRC_TURN_VBUS_EARLY_ON BIT(7)
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#define CI_HDRC_SET_NON_ZERO_TTHA BIT(8)
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#define CI_HDRC_OVERRIDE_AHB_BURST BIT(9)
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#define CI_HDRC_OVERRIDE_TX_BURST BIT(10)
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#define CI_HDRC_OVERRIDE_RX_BURST BIT(11)
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enum usb_dr_mode dr_mode;
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#define CI_HDRC_CONTROLLER_RESET_EVENT 0
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#define CI_HDRC_CONTROLLER_STOPPED_EVENT 1
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void (*notify_event) (struct ci_hdrc *ci, unsigned event);
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struct regulator *reg_vbus;
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struct usb_otg_caps ci_otg_caps;
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bool tpl_support;
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/* interrupt threshold setting */
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u32 itc_setting;
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u32 ahb_burst_config;
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u32 tx_burst_size;
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u32 rx_burst_size;
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/* VBUS and ID signal state tracking, using extcon framework */
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struct ci_hdrc_cable vbus_extcon;
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struct ci_hdrc_cable id_extcon;
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u32 phy_clkgate_delay_us;
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};
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/* Default offset of capability registers */
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#define DEF_CAPOFFSET 0x100
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/* Add ci hdrc device */
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struct platform_device *ci_hdrc_add_device(struct device *dev,
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struct resource *res, int nres,
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struct ci_hdrc_platform_data *platdata);
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/* Remove ci hdrc device */
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void ci_hdrc_remove_device(struct platform_device *pdev);
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#endif
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