mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 19:35:15 +07:00
a10f361d17
This reverts commit1ac159e23c
("drm/i915: Expand subslice mask"), which kills ICL due to GEM_BUG_ON() sanity checks before CI even gets a chance to do anything. The commit exposes an issue in commit1e40d4aea5
("drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads"), which will also need to be addressed. There's a proposed fix [1], but considering the seeming uncertainty with the fix as well as the size of the regressing commit (in this context, the one that actually brings down ICL), this warrants a revert to get ICL working, and gives us time to get all of this right without rushing. Even if this means shooting the messenger. <3>[ 9.426327] intel_sseu_get_subslices:46 GEM_BUG_ON(slice >= sseu->max_slices) <4>[ 9.426355] ------------[ cut here ]------------ <2>[ 9.426357] kernel BUG at drivers/gpu/drm/i915/gt/intel_sseu.c:46! <4>[ 9.426371] invalid opcode: 0000 [#1] PREEMPT SMP NOPTI <4>[ 9.426377] CPU: 1 PID: 364 Comm: systemd-udevd Not tainted 5.2.0-rc2-CI-CI_DRM_6159+ #1 <4>[ 9.426385] Hardware name: Intel Corporation Ice Lake Client Platform/IceLake U DDR4 SODIMM PD RVP TLC, BIOS ICLSFWR1.R00.3183.A00.1905020411 05/02/2019 <4>[ 9.426444] RIP: 0010:intel_sseu_get_subslices+0x8a/0xe0 [i915] <4>[ 9.426452] Code: d5 76 b7 e0 48 8b 35 9d 24 21 00 49 c7 c0 07 f0 72 a0 b9 2e 00 00 00 48 c7 c2 00 8e 6d a0 48 c7 c7 a5 14 5b a0 e8 36 3c be e0 <0f> 0b 48 c7 c1 80 d5 6f a0 ba 30 00 00 00 48 c7 c6 00 8e 6d a0 48 <4>[ 9.426468] RSP: 0018:ffffc9000037b9c8 EFLAGS: 00010282 <4>[ 9.426475] RAX: 000000000000000f RBX: 0000000000000000 RCX: 0000000000000000 <4>[ 9.426482] RDX: 0000000000000001 RSI: 0000000000000008 RDI: ffff88849e346f98 <4>[ 9.426490] RBP: ffff88848a200000 R08: 0000000000000004 R09: ffff88849d50b000 <4>[ 9.426497] R10: 0000000000000000 R11: ffff88849e346f98 R12: ffff88848a209e78 <4>[ 9.426505] R13: 0000000003000000 R14: ffff88848a20b1a8 R15: 0000000000000000 <4>[ 9.426513] FS: 00007f73d5ae8680(0000) GS:ffff88849fc80000(0000) knlGS:0000000000000000 <4>[ 9.426521] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 <4>[ 9.426527] CR2: 0000561417b01260 CR3: 0000000494764003 CR4: 0000000000760ee0 <4>[ 9.426535] PKRU: 55555554 <4>[ 9.426538] Call Trace: <4>[ 9.426585] wa_init_mcr+0xd5/0x110 [i915] <4>[ 9.426597] ? lock_acquire+0xa6/0x1c0 <4>[ 9.426645] icl_gt_workarounds_init+0x21/0x1a0 [i915] <4>[ 9.426694] ? i915_driver_load+0xfcf/0x18a0 [i915] <4>[ 9.426739] gt_init_workarounds+0x14c/0x230 [i915] <4>[ 9.426748] ? _raw_spin_unlock_irq+0x24/0x50 <4>[ 9.426789] intel_gt_init_workarounds+0x1b/0x30 [i915] <4>[ 9.426835] i915_driver_load+0xfd7/0x18a0 [i915] <4>[ 9.426843] ? lock_acquire+0xa6/0x1c0 <4>[ 9.426850] ? __pm_runtime_resume+0x4f/0x80 <4>[ 9.426857] ? _raw_spin_unlock_irqrestore+0x4c/0x60 <4>[ 9.426863] ? _raw_spin_unlock_irqrestore+0x4c/0x60 <4>[ 9.426870] ? lockdep_hardirqs_on+0xe3/0x1b0 <4>[ 9.426915] i915_pci_probe+0x29/0xa0 [i915] <4>[ 9.426923] pci_device_probe+0x9e/0x120 <4>[ 9.426930] really_probe+0xea/0x3c0 <4>[ 9.426936] driver_probe_device+0x10b/0x120 <4>[ 9.426942] device_driver_attach+0x4a/0x50 <4>[ 9.426948] __driver_attach+0x97/0x130 <4>[ 9.426954] ? device_driver_attach+0x50/0x50 <4>[ 9.426960] bus_for_each_dev+0x74/0xc0 <4>[ 9.426966] bus_add_driver+0x13f/0x210 <4>[ 9.426971] ? 0xffffffffa083b000 <4>[ 9.426976] driver_register+0x56/0xe0 <4>[ 9.426982] ? 0xffffffffa083b000 <4>[ 9.426987] do_one_initcall+0x58/0x300 <4>[ 9.426994] ? do_init_module+0x1d/0x1f6 <4>[ 9.427001] ? rcu_read_lock_sched_held+0x6f/0x80 <4>[ 9.427007] ? kmem_cache_alloc_trace+0x261/0x290 <4>[ 9.427014] do_init_module+0x56/0x1f6 <4>[ 9.427020] load_module+0x24d1/0x2990 <4>[ 9.427032] ? __se_sys_finit_module+0xd3/0xf0 <4>[ 9.427037] __se_sys_finit_module+0xd3/0xf0 <4>[ 9.427047] do_syscall_64+0x55/0x1c0 <4>[ 9.427053] entry_SYSCALL_64_after_hwframe+0x49/0xbe <4>[ 9.427059] RIP: 0033:0x7f73d5609839 <4>[ 9.427064] Code: 00 f3 c3 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 40 00 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 1f f6 2c 00 f7 d8 64 89 01 48 <4>[ 9.427082] RSP: 002b:00007ffdf34477b8 EFLAGS: 00000246 ORIG_RAX: 0000000000000139 <4>[ 9.427091] RAX: ffffffffffffffda RBX: 00005559fd5d7b40 RCX: 00007f73d5609839 <4>[ 9.427099] RDX: 0000000000000000 RSI: 00007f73d52e8145 RDI: 000000000000000f <4>[ 9.427106] RBP: 00007f73d52e8145 R08: 0000000000000000 R09: 00007ffdf34478d0 <4>[ 9.427114] R10: 000000000000000f R11: 0000000000000246 R12: 0000000000000000 <4>[ 9.427121] R13: 00005559fd5c90f0 R14: 0000000000020000 R15: 00005559fd5d7b40 <4>[ 9.427131] Modules linked in: i915(+) mei_hdcp x86_pkg_temp_thermal coretemp snd_hda_intel crct10dif_pclmul crc32_pclmul snd_hda_codec snd_hwdep e1000e snd_hda_core ghash_clmulni_intel ptp snd_pcm cdc_ether usbnet mii pps_core mei_me mei prime_numbers btusb btrtl btbcm btintel bluetooth ecdh_generic ecc <4>[ 9.427254] ---[ end trace af3eeb543bd66e66 ]--- [1] http://patchwork.freedesktop.org/patch/msgid/20190528200655.11605-1-chris@chris-wilson.co.uk References: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6159/fi-icl-u2/pstore0-1517155098_Oops_1.log References:1e40d4aea5
("drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads") Fixes:1ac159e23c
("drm/i915: Expand subslice mask") Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Michel Thierry <michel.thierry@intel.com> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Oscar Mateo <oscar.mateo@intel.com> Cc: Stuart Summers <stuart.summers@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: Yunwei Zhang <yunwei.zhang@intel.com> Acked-by: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190529082150.31526-1-jani.nikula@intel.com
193 lines
4.9 KiB
C
193 lines
4.9 KiB
C
/*
|
|
* SPDX-License-Identifier: MIT
|
|
*
|
|
* Copyright © 2018 Intel Corporation
|
|
*/
|
|
|
|
#include <linux/nospec.h>
|
|
|
|
#include "i915_drv.h"
|
|
#include "i915_query.h"
|
|
#include <uapi/drm/i915_drm.h>
|
|
|
|
static int copy_query_item(void *query_hdr, size_t query_sz,
|
|
u32 total_length,
|
|
struct drm_i915_query_item *query_item)
|
|
{
|
|
if (query_item->length == 0)
|
|
return total_length;
|
|
|
|
if (query_item->length < total_length)
|
|
return -EINVAL;
|
|
|
|
if (copy_from_user(query_hdr, u64_to_user_ptr(query_item->data_ptr),
|
|
query_sz))
|
|
return -EFAULT;
|
|
|
|
if (!access_ok(u64_to_user_ptr(query_item->data_ptr),
|
|
total_length))
|
|
return -EFAULT;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int query_topology_info(struct drm_i915_private *dev_priv,
|
|
struct drm_i915_query_item *query_item)
|
|
{
|
|
const struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
|
|
struct drm_i915_query_topology_info topo;
|
|
u32 slice_length, subslice_length, eu_length, total_length;
|
|
u8 subslice_stride = GEN_SSEU_STRIDE(sseu->max_subslices);
|
|
u8 eu_stride = GEN_SSEU_STRIDE(sseu->max_eus_per_subslice);
|
|
int ret;
|
|
|
|
if (query_item->flags != 0)
|
|
return -EINVAL;
|
|
|
|
if (sseu->max_slices == 0)
|
|
return -ENODEV;
|
|
|
|
BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask));
|
|
|
|
slice_length = sizeof(sseu->slice_mask);
|
|
subslice_length = sseu->max_slices * subslice_stride;
|
|
eu_length = sseu->max_slices * sseu->max_subslices * eu_stride;
|
|
total_length = sizeof(topo) + slice_length + subslice_length +
|
|
eu_length;
|
|
|
|
ret = copy_query_item(&topo, sizeof(topo), total_length,
|
|
query_item);
|
|
if (ret != 0)
|
|
return ret;
|
|
|
|
if (topo.flags != 0)
|
|
return -EINVAL;
|
|
|
|
memset(&topo, 0, sizeof(topo));
|
|
topo.max_slices = sseu->max_slices;
|
|
topo.max_subslices = sseu->max_subslices;
|
|
topo.max_eus_per_subslice = sseu->max_eus_per_subslice;
|
|
|
|
topo.subslice_offset = slice_length;
|
|
topo.subslice_stride = subslice_stride;
|
|
topo.eu_offset = slice_length + subslice_length;
|
|
topo.eu_stride = eu_stride;
|
|
|
|
if (__copy_to_user(u64_to_user_ptr(query_item->data_ptr),
|
|
&topo, sizeof(topo)))
|
|
return -EFAULT;
|
|
|
|
if (__copy_to_user(u64_to_user_ptr(query_item->data_ptr + sizeof(topo)),
|
|
&sseu->slice_mask, slice_length))
|
|
return -EFAULT;
|
|
|
|
if (__copy_to_user(u64_to_user_ptr(query_item->data_ptr +
|
|
sizeof(topo) + slice_length),
|
|
sseu->subslice_mask, subslice_length))
|
|
return -EFAULT;
|
|
|
|
if (__copy_to_user(u64_to_user_ptr(query_item->data_ptr +
|
|
sizeof(topo) +
|
|
slice_length + subslice_length),
|
|
sseu->eu_mask, eu_length))
|
|
return -EFAULT;
|
|
|
|
return total_length;
|
|
}
|
|
|
|
static int
|
|
query_engine_info(struct drm_i915_private *i915,
|
|
struct drm_i915_query_item *query_item)
|
|
{
|
|
struct drm_i915_query_engine_info __user *query_ptr =
|
|
u64_to_user_ptr(query_item->data_ptr);
|
|
struct drm_i915_engine_info __user *info_ptr;
|
|
struct drm_i915_query_engine_info query;
|
|
struct drm_i915_engine_info info = { };
|
|
struct intel_engine_cs *engine;
|
|
enum intel_engine_id id;
|
|
int len, ret;
|
|
|
|
if (query_item->flags)
|
|
return -EINVAL;
|
|
|
|
len = sizeof(struct drm_i915_query_engine_info) +
|
|
RUNTIME_INFO(i915)->num_engines *
|
|
sizeof(struct drm_i915_engine_info);
|
|
|
|
ret = copy_query_item(&query, sizeof(query), len, query_item);
|
|
if (ret != 0)
|
|
return ret;
|
|
|
|
if (query.num_engines || query.rsvd[0] || query.rsvd[1] ||
|
|
query.rsvd[2])
|
|
return -EINVAL;
|
|
|
|
info_ptr = &query_ptr->engines[0];
|
|
|
|
for_each_engine(engine, i915, id) {
|
|
info.engine.engine_class = engine->uabi_class;
|
|
info.engine.engine_instance = engine->instance;
|
|
info.capabilities = engine->uabi_capabilities;
|
|
|
|
if (__copy_to_user(info_ptr, &info, sizeof(info)))
|
|
return -EFAULT;
|
|
|
|
query.num_engines++;
|
|
info_ptr++;
|
|
}
|
|
|
|
if (__copy_to_user(query_ptr, &query, sizeof(query)))
|
|
return -EFAULT;
|
|
|
|
return len;
|
|
}
|
|
|
|
static int (* const i915_query_funcs[])(struct drm_i915_private *dev_priv,
|
|
struct drm_i915_query_item *query_item) = {
|
|
query_topology_info,
|
|
query_engine_info,
|
|
};
|
|
|
|
int i915_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
|
|
{
|
|
struct drm_i915_private *dev_priv = to_i915(dev);
|
|
struct drm_i915_query *args = data;
|
|
struct drm_i915_query_item __user *user_item_ptr =
|
|
u64_to_user_ptr(args->items_ptr);
|
|
u32 i;
|
|
|
|
if (args->flags != 0)
|
|
return -EINVAL;
|
|
|
|
for (i = 0; i < args->num_items; i++, user_item_ptr++) {
|
|
struct drm_i915_query_item item;
|
|
unsigned long func_idx;
|
|
int ret;
|
|
|
|
if (copy_from_user(&item, user_item_ptr, sizeof(item)))
|
|
return -EFAULT;
|
|
|
|
if (item.query_id == 0)
|
|
return -EINVAL;
|
|
|
|
if (overflows_type(item.query_id - 1, unsigned long))
|
|
return -EINVAL;
|
|
|
|
func_idx = item.query_id - 1;
|
|
|
|
ret = -EINVAL;
|
|
if (func_idx < ARRAY_SIZE(i915_query_funcs)) {
|
|
func_idx = array_index_nospec(func_idx,
|
|
ARRAY_SIZE(i915_query_funcs));
|
|
ret = i915_query_funcs[func_idx](dev_priv, &item);
|
|
}
|
|
|
|
/* Only write the length back to userspace if they differ. */
|
|
if (ret != item.length && put_user(ret, &user_item_ptr->length))
|
|
return -EFAULT;
|
|
}
|
|
|
|
return 0;
|
|
}
|