mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-13 15:26:54 +07:00
7a8e7da422
This cleans up the module support that was commited earlier to work with what's actually emitted from our GCC port as it lands upstream. Most of the work here is adding new relocations to the kernel. There's some limitations on module loading imposed by the kernel: * The kernel doesn't support linker relaxation, which is necessary to support R_RISCV_ALIGN. In order to get reliable module building you're going to need to a GCC that supports the new '-mno-relax', which IIRC isn't going to be out until 8.1.0. It's somewhat unlikely that R_RISCV_ALIGN will appear in a module even without '-mno-relax' support, so issues shouldn't be common. * There is no large code model for RISC-V, which means modules must be loaded within a 32-bit signed offset of the kernel. We don't currently have any mechanism for ensuring this memory remains free or moving pages around, so issues here might be common. I fixed a singcle merge conflict in arch/riscv/kernel/Makefile.
43 lines
791 B
Makefile
43 lines
791 B
Makefile
#
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# Makefile for the RISC-V Linux kernel
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#
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ifdef CONFIG_FTRACE
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CFLAGS_REMOVE_ftrace.o = -pg
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CFLAGS_REMOVE_setup.o = -pg
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endif
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extra-y += head.o
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extra-y += vmlinux.lds
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obj-y += cpu.o
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obj-y += cpufeature.o
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obj-y += entry.o
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obj-y += irq.o
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obj-y += process.o
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obj-y += ptrace.o
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obj-y += reset.o
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obj-y += setup.o
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obj-y += signal.o
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obj-y += syscall_table.o
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obj-y += sys_riscv.o
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obj-y += time.o
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obj-y += traps.o
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obj-y += riscv_ksyms.o
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obj-y += stacktrace.o
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obj-y += vdso.o
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obj-y += cacheinfo.o
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obj-y += vdso/
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CFLAGS_setup.o := -mcmodel=medany
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obj-$(CONFIG_SMP) += smpboot.o
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obj-$(CONFIG_SMP) += smp.o
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obj-$(CONFIG_MODULES) += module.o
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obj-$(CONFIG_MODULE_SECTIONS) += module-sections.o
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obj-$(CONFIG_FUNCTION_TRACER) += mcount.o ftrace.o
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obj-$(CONFIG_DYNAMIC_FTRACE) += mcount-dyn.o
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clean:
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