linux_dsm_epyc7002/arch/arm/boot/dts/omap3-igep0020.dts
Enric Balletbo i Serra ebc13bf2e0 ARM: dts: omap3-igep0020-common: Introduce igep0020 common dtsi file.
Use the omap3-igep0020-common.dtsi file and remove repeated parts leaving
the nodes that are not common between IGEPv2 hardware revisions.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-12 07:04:37 -08:00

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/*
* Device Tree Source for IGEPv2 Rev. C (TI OMAP AM/DM37x)
*
* Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
* Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "omap3-igep0020-common.dtsi"
/ {
model = "IGEPv2 Rev. C (TI OMAP AM/DM37x)";
compatible = "isee,omap3-igep0020", "ti,omap36xx", "ti,omap3";
/* Regulator to trigger the WIFI_PDN signal of the Wifi module */
lbee1usjyc_pdn: lbee1usjyc_pdn {
compatible = "regulator-fixed";
regulator-name = "regulator-lbee1usjyc-pdn";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; /* gpio_138 - WIFI_PDN */
startup-delay-us = <10000>;
enable-active-high;
};
/* Regulator to trigger the RESET_N_W signal of the Wifi module */
lbee1usjyc_reset_n_w: lbee1usjyc_reset_n_w {
compatible = "regulator-fixed";
regulator-name = "regulator-lbee1usjyc-reset-n-w";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* gpio_139 - RESET_N_W */
enable-active-high;
};
};
&omap3_pmx_core {
lbee1usjyc_pins: pinmux_lbee1usjyc_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat5.gpio_137 - RESET_N_W */
OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat6.gpio_138 - WIFI_PDN */
OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 - RST_N_B */
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
>;
};
};
/* On board Wifi module */
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins &lbee1usjyc_pins>;
vmmc-supply = <&lbee1usjyc_pdn>;
vmmc_aux-supply = <&lbee1usjyc_reset_n_w>;
bus-width = <4>;
non-removable;
};