mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 23:40:55 +07:00
a233bb742a
DT changes continue to be the bulk of our merge window contents. We continue to have a large set of changes across the board as new platforms and drivers are added. Some of the new platforms are: - Alphascale ASM9260 - Marvell Armada 388 - CSR Atlas7 - TI Davinci DM816x - Hisilicon HiP01 - ST STiH418 There have also been some sweeping changes, including relicensing of DTS contents from GPL to GPLv2+/X11 so that the same files can be reused in other non-GPL projects more easily. There's also been changes to the DT Makefile to make it a little less conflict-ridden and churny down the road. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJU4u0bAAoJEIwa5zzehBx3XFQP+wbVDp39ay3SRanFWeXqhfTe 6jRsYrOcq6BN/b1NugjD+yKIYp2MQhwlXbMmj/1vnmJ3XSY25ZMLlgs0/vsNk7W2 5e0xySwdhd1DjsajhZyN+5gUgqcTgOof/V+CbEUkijDDJ9v/WJbGZrpCHDz+UVTh dG9p1vrKoxDELAVbnp9muKZPlaQkAM60zJcHNJw9bJB5M0RCx4XFwPZc1cDLIsIZ lK/uYpKsgvgrGw5QuCtEK1/NkqLkBqgBfVg6xq0VB6OCYetqpxqs7kSZjnncIhQc PvxShsIJzb/dgfk7xBVb1+4Jfe5L/4poFwS69QuBlr/wiwc7wrhv37edgkyDlclS aj5xfOIhQdDaTkknFVs4QEkGAFg/lnTZnmiNiQdlsmDHqbWdTEELKShdVeMO7Zsg 6bPdDipA2jsQ86UWNwucis8QulzVTuyNuU+Mlrxp73b76+hKXLkbYcZ51FJ/xMD8 wLpCGqtc9Quirdb7Wy7XiVfesv3lKfDmzZB/6ZJ6zfadDvsqJPxAjNTA8VYZ9YeT EyW4K6CMOa5v+sLmIQUsAjKCYaul3PVDCi4voQjpS1ZtPLw+WN3zqX5XZZDT9Ll2 D1ycmInp/40KsQgjV36u1NlIKMM+oaUJaSzaSPGdgj3Zcw0YZi8O+h0m6iHrlzUB uGFufsLKmcOFY/sLwprt =XEw1 -----END PGP SIGNATURE----- Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Olof Johansson: "DT changes continue to be the bulk of our merge window contents. We continue to have a large set of changes across the board as new platforms and drivers are added. Some of the new platforms are: - Alphascale ASM9260 - Marvell Armada 388 - CSR Atlas7 - TI Davinci DM816x - Hisilicon HiP01 - ST STiH418 There have also been some sweeping changes, including relicensing of DTS contents from GPL to GPLv2+/X11 so that the same files can be reused in other non-GPL projects more easily. There's also been changes to the DT Makefile to make it a little less conflict-ridden and churny down the road" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (330 commits) ARM: dts: Add PPMU node for exynos4412-trats2 ARM: dts: Add PPMU node for exynos3250-monk and exynos3250-rinato ARM: dts: Add PPMU dt node for exynos4 and exynos4210 ARM: dts: Add PPMU dt node for exynos3250 ARM: dts: add mipi dsi device node for exynos4415 ARM: dts: add fimd device node for exynos4415 ARM: dts: Add syscon phandle to the video-phy node for Exynos4 ARM: dts: Add sound nodes for exynos4412-trats2 ARM: dts: Fix CLK_MOUT_CAMn parent clocks assignment for exynos4412-trats2 ARM: dts: Fix CLK_UART_ISP_SCLK clock assignment in exynos4x12.dtsi ARM: dts: Add max77693 charger node for exynos4412-trats2 ARM: dts: Switch max77686 regulators to GPIO control for exynos4412-trats2 ARM: dts: Add suspend configuration for max77686 regulators for exynos4412-trats2 ARM: dts: Add Maxim 77693 fuel gauge node for exynos4412-trats2 ARM: dts: am57xx-beagle-x15: Fix USB2 mode ARM: dts: am57xx-beagle-x15: Add extcon nodes for USB ARM: dts: dra72-evm: Add extcon nodes for USB ARM: dts: dra7-evm: Add extcon nodes for USB ARM: dts: rockchip: move the hdmi ddc-i2c-bus property to the actual boards ARM: dts: rockchip: enable vops and hdmi output on rk3288-firefly and -evb ...
513 lines
11 KiB
Plaintext
513 lines
11 KiB
Plaintext
/*
|
|
* Samsung's Exynos4210 based Universal C210 board device tree source
|
|
*
|
|
* Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
|
|
* http://www.samsung.com
|
|
*
|
|
* Device tree source file for Samsung's Universal C210 board which is based on
|
|
* Samsung's Exynos4210 rev0 SoC.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "exynos4210.dtsi"
|
|
|
|
/ {
|
|
model = "Samsung Universal C210 based on Exynos4210 rev0";
|
|
compatible = "samsung,universal_c210", "samsung,exynos4210", "samsung,exynos4";
|
|
|
|
memory {
|
|
reg = <0x40000000 0x10000000
|
|
0x50000000 0x10000000>;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1";
|
|
stdout-path = &serial_2;
|
|
};
|
|
|
|
sysram@02020000 {
|
|
smp-sysram@0 {
|
|
status = "disabled";
|
|
};
|
|
|
|
smp-sysram@5000 {
|
|
compatible = "samsung,exynos4210-sysram";
|
|
reg = <0x5000 0x1000>;
|
|
};
|
|
|
|
smp-sysram@1f000 {
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
mct@10050000 {
|
|
compatible = "none";
|
|
};
|
|
|
|
fixed-rate-clocks {
|
|
xxti {
|
|
compatible = "samsung,clock-xxti";
|
|
clock-frequency = <0>;
|
|
};
|
|
|
|
xusbxti {
|
|
compatible = "samsung,clock-xusbxti";
|
|
clock-frequency = <24000000>;
|
|
};
|
|
};
|
|
|
|
vemmc_reg: voltage-regulator {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "VMEM_VDD_2_8V";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
gpio = <&gpe1 3 0>;
|
|
enable-active-high;
|
|
};
|
|
|
|
hsotg@12480000 {
|
|
vusb_d-supply = <&ldo3_reg>;
|
|
vusb_a-supply = <&ldo8_reg>;
|
|
dr_mode = "peripheral";
|
|
status = "okay";
|
|
};
|
|
|
|
sdhci_emmc: sdhci@12510000 {
|
|
bus-width = <8>;
|
|
non-removable;
|
|
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>;
|
|
pinctrl-names = "default";
|
|
vmmc-supply = <&vemmc_reg>;
|
|
status = "okay";
|
|
};
|
|
|
|
sdhci_sd: sdhci@12530000 {
|
|
bus-width = <4>;
|
|
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
|
|
pinctrl-names = "default";
|
|
vmmc-supply = <&ldo5_reg>;
|
|
cd-gpios = <&gpx3 4 0>;
|
|
cd-inverted;
|
|
status = "okay";
|
|
};
|
|
|
|
ehci@12580000 {
|
|
status = "okay";
|
|
port@0 {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
ohci@12590000 {
|
|
status = "okay";
|
|
port@0 {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
exynos-usbphy@125B0000 {
|
|
status = "okay";
|
|
};
|
|
|
|
serial@13800000 {
|
|
status = "okay";
|
|
};
|
|
|
|
serial@13810000 {
|
|
status = "okay";
|
|
};
|
|
|
|
serial@13820000 {
|
|
status = "okay";
|
|
};
|
|
|
|
serial@13830000 {
|
|
status = "okay";
|
|
};
|
|
|
|
gpio-keys {
|
|
compatible = "gpio-keys";
|
|
|
|
vol-up-key {
|
|
gpios = <&gpx2 0 1>;
|
|
linux,code = <115>;
|
|
label = "volume up";
|
|
debounce-interval = <1>;
|
|
};
|
|
|
|
vol-down-key {
|
|
gpios = <&gpx2 1 1>;
|
|
linux,code = <114>;
|
|
label = "volume down";
|
|
debounce-interval = <1>;
|
|
};
|
|
|
|
config-key {
|
|
gpios = <&gpx2 2 1>;
|
|
linux,code = <171>;
|
|
label = "config";
|
|
debounce-interval = <1>;
|
|
gpio-key,wakeup;
|
|
};
|
|
|
|
camera-key {
|
|
gpios = <&gpx2 3 1>;
|
|
linux,code = <212>;
|
|
label = "camera";
|
|
debounce-interval = <1>;
|
|
};
|
|
|
|
power-key {
|
|
gpios = <&gpx2 7 1>;
|
|
linux,code = <116>;
|
|
label = "power";
|
|
debounce-interval = <1>;
|
|
gpio-key,wakeup;
|
|
};
|
|
|
|
ok-key {
|
|
gpios = <&gpx3 5 1>;
|
|
linux,code = <352>;
|
|
label = "ok";
|
|
debounce-interval = <1>;
|
|
};
|
|
};
|
|
|
|
tsp_reg: voltage-regulator {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "TSP_2_8V";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
gpio = <&gpe2 3 0>;
|
|
enable-active-high;
|
|
};
|
|
|
|
i2c@13890000 {
|
|
samsung,i2c-sda-delay = <100>;
|
|
samsung,i2c-slave-addr = <0x10>;
|
|
samsung,i2c-max-bus-freq = <100000>;
|
|
pinctrl-0 = <&i2c3_bus>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
|
|
tsp@4a {
|
|
/* TBD: Atmel maXtouch touchscreen */
|
|
reg = <0x4a>;
|
|
};
|
|
};
|
|
|
|
i2c@138B0000 {
|
|
samsung,i2c-sda-delay = <100>;
|
|
samsung,i2c-slave-addr = <0x10>;
|
|
samsung,i2c-max-bus-freq = <100000>;
|
|
pinctrl-0 = <&i2c5_bus>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
|
|
vdd_arm_reg: pmic@60 {
|
|
compatible = "maxim,max8952";
|
|
reg = <0x60>;
|
|
|
|
max8952,vid-gpios = <&gpx0 3 0>, <&gpx0 4 0>;
|
|
max8952,default-mode = <0>;
|
|
max8952,dvs-mode-microvolt = <1250000>, <1200000>,
|
|
<1050000>, <950000>;
|
|
max8952,sync-freq = <0>;
|
|
max8952,ramp-speed = <0>;
|
|
|
|
regulator-name = "vdd_arm";
|
|
regulator-min-microvolt = <770000>;
|
|
regulator-max-microvolt = <1400000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
pmic@66 {
|
|
compatible = "national,lp3974";
|
|
reg = <0x66>;
|
|
|
|
max8998,pmic-buck1-default-dvs-idx = <0>;
|
|
max8998,pmic-buck1-dvs-gpios = <&gpx0 5 0>,
|
|
<&gpx0 6 0>;
|
|
max8998,pmic-buck1-dvs-voltage = <1100000>, <1000000>,
|
|
<1100000>, <1000000>;
|
|
|
|
max8998,pmic-buck2-default-dvs-idx = <0>;
|
|
max8998,pmic-buck2-dvs-gpio = <&gpe2 0 0>;
|
|
max8998,pmic-buck2-dvs-voltage = <1200000>, <1100000>;
|
|
|
|
regulators {
|
|
ldo2_reg: LDO2 {
|
|
regulator-name = "VALIVE_1.2V";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo3_reg: LDO3 {
|
|
regulator-name = "VUSB+MIPI_1.1V";
|
|
regulator-min-microvolt = <1100000>;
|
|
regulator-max-microvolt = <1100000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo4_reg: LDO4 {
|
|
regulator-name = "VADC_3.3V";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
ldo5_reg: LDO5 {
|
|
regulator-name = "VTF_2.8V";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
};
|
|
|
|
ldo6_reg: LDO6 {
|
|
regulator-name = "LDO6";
|
|
regulator-min-microvolt = <2000000>;
|
|
regulator-max-microvolt = <2000000>;
|
|
};
|
|
|
|
ldo7_reg: LDO7 {
|
|
regulator-name = "VLCD+VMIPI_1.8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo8_reg: LDO8 {
|
|
regulator-name = "VUSB+VDAC_3.3V";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo9_reg: LDO9 {
|
|
regulator-name = "VCC_2.8V";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo10_reg: LDO10 {
|
|
regulator-name = "VPLL_1.1V";
|
|
regulator-min-microvolt = <1100000>;
|
|
regulator-max-microvolt = <1100000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo11_reg: LDO11 {
|
|
regulator-name = "CAM_AF_3.3V";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
ldo12_reg: LDO12 {
|
|
regulator-name = "PS_2.8V";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
};
|
|
|
|
ldo13_reg: LDO13 {
|
|
regulator-name = "VHIC_1.2V";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
};
|
|
|
|
ldo14_reg: LDO14 {
|
|
regulator-name = "CAM_I_HOST_1.8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo15_reg: LDO15 {
|
|
regulator-name = "CAM_S_DIG+FM33_CORE_1.2V";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
};
|
|
|
|
ldo16_reg: LDO16 {
|
|
regulator-name = "CAM_S_ANA_2.8V";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
};
|
|
|
|
ldo17_reg: LDO17 {
|
|
regulator-name = "VCC_3.0V_LCD";
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
};
|
|
|
|
buck1_reg: BUCK1 {
|
|
regulator-name = "VINT_1.1V";
|
|
regulator-min-microvolt = <750000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
buck2_reg: BUCK2 {
|
|
regulator-name = "VG3D_1.1V";
|
|
regulator-min-microvolt = <750000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
buck3_reg: BUCK3 {
|
|
regulator-name = "VCC_1.8V";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
buck4_reg: BUCK4 {
|
|
regulator-name = "VMEM_1.2V";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ap32khz_reg: EN32KHz-AP {
|
|
regulator-name = "32KHz AP";
|
|
regulator-always-on;
|
|
};
|
|
|
|
cp32khz_reg: EN32KHz-CP {
|
|
regulator-name = "32KHz CP";
|
|
};
|
|
|
|
vichg_reg: ENVICHG {
|
|
regulator-name = "VICHG";
|
|
};
|
|
|
|
safeout1_reg: ESAFEOUT1 {
|
|
regulator-name = "SAFEOUT1";
|
|
regulator-always-on;
|
|
};
|
|
|
|
safeout2_reg: ESAFEOUT2 {
|
|
regulator-name = "SAFEOUT2";
|
|
regulator-boot-on;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
spi-lcd {
|
|
compatible = "spi-gpio";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
gpio-sck = <&gpy3 1 0>;
|
|
gpio-mosi = <&gpy3 3 0>;
|
|
num-chipselects = <1>;
|
|
cs-gpios = <&gpy4 3 0>;
|
|
|
|
lcd@0 {
|
|
compatible = "samsung,ld9040";
|
|
reg = <0>;
|
|
vdd3-supply = <&ldo7_reg>;
|
|
vci-supply = <&ldo17_reg>;
|
|
reset-gpios = <&gpy4 5 0>;
|
|
spi-max-frequency = <1200000>;
|
|
spi-cpol;
|
|
spi-cpha;
|
|
power-on-delay = <10>;
|
|
reset-delay = <10>;
|
|
panel-width-mm = <90>;
|
|
panel-height-mm = <154>;
|
|
display-timings {
|
|
timing {
|
|
clock-frequency = <23492370>;
|
|
hactive = <480>;
|
|
vactive = <800>;
|
|
hback-porch = <16>;
|
|
hfront-porch = <16>;
|
|
vback-porch = <2>;
|
|
vfront-porch = <28>;
|
|
hsync-len = <2>;
|
|
vsync-len = <1>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
de-active = <0>;
|
|
pixelclk-active = <0>;
|
|
};
|
|
};
|
|
port {
|
|
lcd_ep: endpoint {
|
|
remote-endpoint = <&fimd_dpi_ep>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
fimd: fimd@11c00000 {
|
|
pinctrl-0 = <&lcd_clk>, <&lcd_data24>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
samsung,invert-vden;
|
|
samsung,invert-vclk;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
port@3 {
|
|
reg = <3>;
|
|
fimd_dpi_ep: endpoint {
|
|
remote-endpoint = <&lcd_ep>;
|
|
};
|
|
};
|
|
};
|
|
|
|
pwm@139D0000 {
|
|
compatible = "samsung,s5p6440-pwm";
|
|
status = "okay";
|
|
};
|
|
|
|
camera {
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <>;
|
|
|
|
fimc_0: fimc@11800000 {
|
|
status = "okay";
|
|
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
|
|
<&clock CLK_SCLK_FIMC0>;
|
|
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
|
|
assigned-clock-rates = <0>, <160000000>;
|
|
};
|
|
|
|
fimc_1: fimc@11810000 {
|
|
status = "okay";
|
|
assigned-clocks = <&clock CLK_MOUT_FIMC1>,
|
|
<&clock CLK_SCLK_FIMC1>;
|
|
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
|
|
assigned-clock-rates = <0>, <160000000>;
|
|
};
|
|
|
|
fimc_2: fimc@11820000 {
|
|
status = "okay";
|
|
assigned-clocks = <&clock CLK_MOUT_FIMC2>,
|
|
<&clock CLK_SCLK_FIMC2>;
|
|
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
|
|
assigned-clock-rates = <0>, <160000000>;
|
|
};
|
|
|
|
fimc_3: fimc@11830000 {
|
|
status = "okay";
|
|
assigned-clocks = <&clock CLK_MOUT_FIMC3>,
|
|
<&clock CLK_SCLK_FIMC3>;
|
|
assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
|
|
assigned-clock-rates = <0>, <160000000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&mdma1 {
|
|
reg = <0x12840000 0x1000>;
|
|
};
|