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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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70fe3af840
The Power ISA 2.06 spec introduces a standard MMU programming model that is based on the Freescale Book-E MMU programing model. The Freescale version is pretty backwards compatiable with the ISA 2.06 definition so we are starting to refactor some of the Freescale code so it can be easily shared. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
104 lines
2.7 KiB
C
104 lines
2.7 KiB
C
#ifndef _ASM_POWERPC_MMU_BOOK3E_H_
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#define _ASM_POWERPC_MMU_BOOK3E_H_
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/*
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* Freescale Book-E/Book-3e (ISA 2.06+) MMU support
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*/
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/* Book-3e defined page sizes */
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#define BOOK3E_PAGESZ_1K 0
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#define BOOK3E_PAGESZ_2K 1
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#define BOOK3E_PAGESZ_4K 2
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#define BOOK3E_PAGESZ_8K 3
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#define BOOK3E_PAGESZ_16K 4
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#define BOOK3E_PAGESZ_32K 5
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#define BOOK3E_PAGESZ_64K 6
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#define BOOK3E_PAGESZ_128K 7
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#define BOOK3E_PAGESZ_256K 8
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#define BOOK3E_PAGESZ_512K 9
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#define BOOK3E_PAGESZ_1M 10
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#define BOOK3E_PAGESZ_2M 11
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#define BOOK3E_PAGESZ_4M 12
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#define BOOK3E_PAGESZ_8M 13
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#define BOOK3E_PAGESZ_16M 14
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#define BOOK3E_PAGESZ_32M 15
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#define BOOK3E_PAGESZ_64M 16
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#define BOOK3E_PAGESZ_128M 17
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#define BOOK3E_PAGESZ_256M 18
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#define BOOK3E_PAGESZ_512M 19
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#define BOOK3E_PAGESZ_1GB 20
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#define BOOK3E_PAGESZ_2GB 21
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#define BOOK3E_PAGESZ_4GB 22
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#define BOOK3E_PAGESZ_8GB 23
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#define BOOK3E_PAGESZ_16GB 24
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#define BOOK3E_PAGESZ_32GB 25
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#define BOOK3E_PAGESZ_64GB 26
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#define BOOK3E_PAGESZ_128GB 27
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#define BOOK3E_PAGESZ_256GB 28
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#define BOOK3E_PAGESZ_512GB 29
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#define BOOK3E_PAGESZ_1TB 30
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#define BOOK3E_PAGESZ_2TB 31
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#define MAS0_TLBSEL(x) ((x << 28) & 0x30000000)
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#define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000)
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#define MAS0_NV(x) ((x) & 0x00000FFF)
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#define MAS1_VALID 0x80000000
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#define MAS1_IPROT 0x40000000
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#define MAS1_TID(x) ((x << 16) & 0x3FFF0000)
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#define MAS1_IND 0x00002000
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#define MAS1_TS 0x00001000
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#define MAS1_TSIZE(x) ((x << 7) & 0x00000F80)
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#define MAS2_EPN 0xFFFFF000
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#define MAS2_X0 0x00000040
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#define MAS2_X1 0x00000020
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#define MAS2_W 0x00000010
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#define MAS2_I 0x00000008
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#define MAS2_M 0x00000004
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#define MAS2_G 0x00000002
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#define MAS2_E 0x00000001
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#define MAS2_EPN_MASK(size) (~0 << (size + 10))
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#define MAS2_VAL(addr, size, flags) ((addr) & MAS2_EPN_MASK(size) | (flags))
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#define MAS3_RPN 0xFFFFF000
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#define MAS3_U0 0x00000200
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#define MAS3_U1 0x00000100
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#define MAS3_U2 0x00000080
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#define MAS3_U3 0x00000040
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#define MAS3_UX 0x00000020
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#define MAS3_SX 0x00000010
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#define MAS3_UW 0x00000008
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#define MAS3_SW 0x00000004
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#define MAS3_UR 0x00000002
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#define MAS3_SR 0x00000001
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#define MAS4_TLBSELD(x) MAS0_TLBSEL(x)
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#define MAS4_INDD 0x00008000
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#define MAS4_TSIZED(x) MAS1_TSIZE(x)
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#define MAS4_X0D 0x00000040
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#define MAS4_X1D 0x00000020
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#define MAS4_WD 0x00000010
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#define MAS4_ID 0x00000008
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#define MAS4_MD 0x00000004
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#define MAS4_GD 0x00000002
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#define MAS4_ED 0x00000001
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#define MAS6_SPID0 0x3FFF0000
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#define MAS6_SPID1 0x00007FFE
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#define MAS6_ISIZE(x) MAS1_TSIZE(x)
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#define MAS6_SAS 0x00000001
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#define MAS6_SPID MAS6_SPID0
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#define MAS7_RPN 0xFFFFFFFF
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#ifndef __ASSEMBLY__
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typedef struct {
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unsigned int id;
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unsigned int active;
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unsigned long vdso_base;
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} mm_context_t;
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_POWERPC_MMU_BOOK3E_H_ */
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