mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-02 02:26:52 +07:00
27f768192f
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
104 lines
2.8 KiB
C
104 lines
2.8 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001, 2003 Keith M Wesolowski
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* Copyright (C) 2005 Ilya A. Volynets <ilya@total-knowledge.com>
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <asm/bootinfo.h>
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#include <asm/io.h>
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#include <asm/mipsregs.h>
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#include <asm/page.h>
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#include <asm/ip32/crime.h>
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#include <asm/ip32/mace.h>
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struct sgi_crime __iomem *crime;
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struct sgi_mace __iomem *mace;
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EXPORT_SYMBOL_GPL(mace);
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void __init crime_init(void)
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{
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unsigned int id, rev;
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const int field = 2 * sizeof(unsigned long);
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set_io_port_base((unsigned long) ioremap(MACEPCI_LOW_IO, 0x2000000));
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crime = ioremap(CRIME_BASE, sizeof(struct sgi_crime));
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mace = ioremap(MACE_BASE, sizeof(struct sgi_mace));
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id = crime->id;
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rev = id & CRIME_ID_REV;
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id = (id & CRIME_ID_IDBITS) >> 4;
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printk (KERN_INFO "CRIME id %1x rev %d at 0x%0*lx\n",
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id, rev, field, (unsigned long) CRIME_BASE);
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}
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irqreturn_t crime_memerr_intr(unsigned int irq, void *dev_id)
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{
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unsigned long stat, addr;
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int fatal = 0;
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stat = crime->mem_error_stat & CRIME_MEM_ERROR_STAT_MASK;
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addr = crime->mem_error_addr & CRIME_MEM_ERROR_ADDR_MASK;
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printk("CRIME memory error at 0x%08lx ST 0x%08lx<", addr, stat);
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if (stat & CRIME_MEM_ERROR_INV)
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printk("INV,");
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if (stat & CRIME_MEM_ERROR_ECC) {
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unsigned long ecc_syn =
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crime->mem_ecc_syn & CRIME_MEM_ERROR_ECC_SYN_MASK;
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unsigned long ecc_gen =
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crime->mem_ecc_chk & CRIME_MEM_ERROR_ECC_CHK_MASK;
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printk("ECC,SYN=0x%08lx,GEN=0x%08lx,", ecc_syn, ecc_gen);
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}
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if (stat & CRIME_MEM_ERROR_MULTIPLE) {
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fatal = 1;
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printk("MULTIPLE,");
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}
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if (stat & CRIME_MEM_ERROR_HARD_ERR) {
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fatal = 1;
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printk("HARD,");
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}
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if (stat & CRIME_MEM_ERROR_SOFT_ERR)
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printk("SOFT,");
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if (stat & CRIME_MEM_ERROR_CPU_ACCESS)
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printk("CPU,");
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if (stat & CRIME_MEM_ERROR_VICE_ACCESS)
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printk("VICE,");
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if (stat & CRIME_MEM_ERROR_GBE_ACCESS)
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printk("GBE,");
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if (stat & CRIME_MEM_ERROR_RE_ACCESS)
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printk("RE,REID=0x%02lx,", (stat & CRIME_MEM_ERROR_RE_ID)>>8);
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if (stat & CRIME_MEM_ERROR_MACE_ACCESS)
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printk("MACE,MACEID=0x%02lx,", stat & CRIME_MEM_ERROR_MACE_ID);
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crime->mem_error_stat = 0;
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if (fatal) {
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printk("FATAL>\n");
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panic("Fatal memory error.");
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} else
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printk("NONFATAL>\n");
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return IRQ_HANDLED;
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}
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irqreturn_t crime_cpuerr_intr(unsigned int irq, void *dev_id)
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{
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unsigned long stat = crime->cpu_error_stat & CRIME_CPU_ERROR_MASK;
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unsigned long addr = crime->cpu_error_addr & CRIME_CPU_ERROR_ADDR_MASK;
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addr <<= 2;
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printk ("CRIME CPU error at 0x%09lx status 0x%08lx\n", addr, stat);
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crime->cpu_error_stat = 0;
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return IRQ_HANDLED;
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}
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