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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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70adc3f32a
This <mach/regs-timer.h> is broadcasted in the entire kernel for no good reason, since it's only used by the timer driver. Merge it into the driver. Tested-by: Greg Ungerer <gerg@snapgear.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
150 lines
4.3 KiB
C
150 lines
4.3 KiB
C
/*
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* arch/arm/mach-ks8695/time.c
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*
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* Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
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* Copyright (C) 2006 Simtec Electronics
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/io.h>
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#include <asm/mach/time.h>
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#include <asm/system_misc.h>
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#include <mach/regs-irq.h>
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#include "generic.h"
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#define KS8695_TMR_OFFSET (0xF0000 + 0xE400)
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#define KS8695_TMR_VA (KS8695_IO_VA + KS8695_TMR_OFFSET)
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#define KS8695_TMR_PA (KS8695_IO_PA + KS8695_TMR_OFFSET)
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/*
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* Timer registers
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*/
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#define KS8695_TMCON (0x00) /* Timer Control Register */
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#define KS8695_T1TC (0x04) /* Timer 1 Timeout Count Register */
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#define KS8695_T0TC (0x08) /* Timer 0 Timeout Count Register */
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#define KS8695_T1PD (0x0C) /* Timer 1 Pulse Count Register */
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#define KS8695_T0PD (0x10) /* Timer 0 Pulse Count Register */
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/* Timer Control Register */
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#define TMCON_T1EN (1 << 1) /* Timer 1 Enable */
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#define TMCON_T0EN (1 << 0) /* Timer 0 Enable */
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/* Timer0 Timeout Counter Register */
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#define T0TC_WATCHDOG (0xff) /* Enable watchdog mode */
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/*
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* Returns number of ms since last clock interrupt. Note that interrupts
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* will have been disabled by do_gettimeoffset()
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*/
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static unsigned long ks8695_gettimeoffset (void)
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{
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unsigned long elapsed, tick2, intpending;
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/*
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* Get the current number of ticks. Note that there is a race
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* condition between us reading the timer and checking for an
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* interrupt. We solve this by ensuring that the counter has not
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* reloaded between our two reads.
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*/
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elapsed = __raw_readl(KS8695_TMR_VA + KS8695_T1TC) + __raw_readl(KS8695_TMR_VA + KS8695_T1PD);
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do {
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tick2 = elapsed;
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intpending = __raw_readl(KS8695_IRQ_VA + KS8695_INTST) & (1 << KS8695_IRQ_TIMER1);
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elapsed = __raw_readl(KS8695_TMR_VA + KS8695_T1TC) + __raw_readl(KS8695_TMR_VA + KS8695_T1PD);
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} while (elapsed > tick2);
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/* Convert to number of ticks expired (not remaining) */
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elapsed = (CLOCK_TICK_RATE / HZ) - elapsed;
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/* Is interrupt pending? If so, then timer has been reloaded already. */
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if (intpending)
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elapsed += (CLOCK_TICK_RATE / HZ);
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/* Convert ticks to usecs */
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return (unsigned long)(elapsed * (tick_nsec / 1000)) / LATCH;
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}
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/*
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* IRQ handler for the timer.
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*/
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static irqreturn_t ks8695_timer_interrupt(int irq, void *dev_id)
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{
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timer_tick();
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return IRQ_HANDLED;
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}
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static struct irqaction ks8695_timer_irq = {
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.name = "ks8695_tick",
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.flags = IRQF_DISABLED | IRQF_TIMER,
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.handler = ks8695_timer_interrupt,
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};
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static void ks8695_timer_setup(void)
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{
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unsigned long tmout = CLOCK_TICK_RATE / HZ;
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unsigned long tmcon;
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/* disable timer1 */
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tmcon = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
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__raw_writel(tmcon & ~TMCON_T1EN, KS8695_TMR_VA + KS8695_TMCON);
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__raw_writel(tmout / 2, KS8695_TMR_VA + KS8695_T1TC);
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__raw_writel(tmout / 2, KS8695_TMR_VA + KS8695_T1PD);
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/* re-enable timer1 */
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__raw_writel(tmcon | TMCON_T1EN, KS8695_TMR_VA + KS8695_TMCON);
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}
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static void __init ks8695_timer_init (void)
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{
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ks8695_timer_setup();
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/* Enable timer interrupts */
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setup_irq(KS8695_IRQ_TIMER1, &ks8695_timer_irq);
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}
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struct sys_timer ks8695_timer = {
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.init = ks8695_timer_init,
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.offset = ks8695_gettimeoffset,
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.resume = ks8695_timer_setup,
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};
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void ks8695_restart(char mode, const char *cmd)
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{
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unsigned int reg;
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if (mode == 's')
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soft_restart(0);
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/* disable timer0 */
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reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON);
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__raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
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/* enable watchdog mode */
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__raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC);
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/* re-enable timer0 */
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__raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON);
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}
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