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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 228 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528171438.107155473@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
315 lines
7.4 KiB
C
315 lines
7.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* System Control and Power Interface (SCPI) Protocol based clock driver
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*
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* Copyright (C) 2015 ARM Ltd.
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*/
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#include <linux/clk-provider.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/scpi_protocol.h>
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struct scpi_clk {
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u32 id;
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struct clk_hw hw;
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struct scpi_dvfs_info *info;
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struct scpi_ops *scpi_ops;
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};
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#define to_scpi_clk(clk) container_of(clk, struct scpi_clk, hw)
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static struct platform_device *cpufreq_dev;
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static unsigned long scpi_clk_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct scpi_clk *clk = to_scpi_clk(hw);
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return clk->scpi_ops->clk_get_val(clk->id);
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}
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static long scpi_clk_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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/*
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* We can't figure out what rate it will be, so just return the
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* rate back to the caller. scpi_clk_recalc_rate() will be called
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* after the rate is set and we'll know what rate the clock is
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* running at then.
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*/
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return rate;
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}
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static int scpi_clk_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct scpi_clk *clk = to_scpi_clk(hw);
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return clk->scpi_ops->clk_set_val(clk->id, rate);
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}
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static const struct clk_ops scpi_clk_ops = {
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.recalc_rate = scpi_clk_recalc_rate,
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.round_rate = scpi_clk_round_rate,
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.set_rate = scpi_clk_set_rate,
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};
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/* find closest match to given frequency in OPP table */
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static long __scpi_dvfs_round_rate(struct scpi_clk *clk, unsigned long rate)
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{
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int idx;
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unsigned long fmin = 0, fmax = ~0, ftmp;
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const struct scpi_opp *opp = clk->info->opps;
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for (idx = 0; idx < clk->info->count; idx++, opp++) {
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ftmp = opp->freq;
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if (ftmp >= rate) {
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if (ftmp <= fmax)
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fmax = ftmp;
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break;
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} else if (ftmp >= fmin) {
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fmin = ftmp;
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}
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}
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return fmax != ~0 ? fmax : fmin;
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}
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static unsigned long scpi_dvfs_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct scpi_clk *clk = to_scpi_clk(hw);
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int idx = clk->scpi_ops->dvfs_get_idx(clk->id);
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const struct scpi_opp *opp;
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if (idx < 0)
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return 0;
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opp = clk->info->opps + idx;
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return opp->freq;
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}
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static long scpi_dvfs_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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struct scpi_clk *clk = to_scpi_clk(hw);
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return __scpi_dvfs_round_rate(clk, rate);
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}
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static int __scpi_find_dvfs_index(struct scpi_clk *clk, unsigned long rate)
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{
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int idx, max_opp = clk->info->count;
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const struct scpi_opp *opp = clk->info->opps;
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for (idx = 0; idx < max_opp; idx++, opp++)
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if (opp->freq == rate)
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return idx;
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return -EINVAL;
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}
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static int scpi_dvfs_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct scpi_clk *clk = to_scpi_clk(hw);
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int ret = __scpi_find_dvfs_index(clk, rate);
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if (ret < 0)
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return ret;
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return clk->scpi_ops->dvfs_set_idx(clk->id, (u8)ret);
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}
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static const struct clk_ops scpi_dvfs_ops = {
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.recalc_rate = scpi_dvfs_recalc_rate,
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.round_rate = scpi_dvfs_round_rate,
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.set_rate = scpi_dvfs_set_rate,
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};
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static const struct of_device_id scpi_clk_match[] = {
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{ .compatible = "arm,scpi-dvfs-clocks", .data = &scpi_dvfs_ops, },
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{ .compatible = "arm,scpi-variable-clocks", .data = &scpi_clk_ops, },
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{}
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};
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static int
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scpi_clk_ops_init(struct device *dev, const struct of_device_id *match,
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struct scpi_clk *sclk, const char *name)
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{
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struct clk_init_data init;
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unsigned long min = 0, max = 0;
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int ret;
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init.name = name;
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init.flags = 0;
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init.num_parents = 0;
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init.ops = match->data;
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sclk->hw.init = &init;
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sclk->scpi_ops = get_scpi_ops();
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if (init.ops == &scpi_dvfs_ops) {
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sclk->info = sclk->scpi_ops->dvfs_get_info(sclk->id);
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if (IS_ERR(sclk->info))
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return PTR_ERR(sclk->info);
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} else if (init.ops == &scpi_clk_ops) {
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if (sclk->scpi_ops->clk_get_range(sclk->id, &min, &max) || !max)
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return -EINVAL;
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} else {
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return -EINVAL;
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}
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ret = devm_clk_hw_register(dev, &sclk->hw);
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if (!ret && max)
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clk_hw_set_rate_range(&sclk->hw, min, max);
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return ret;
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}
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struct scpi_clk_data {
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struct scpi_clk **clk;
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unsigned int clk_num;
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};
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static struct clk_hw *
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scpi_of_clk_src_get(struct of_phandle_args *clkspec, void *data)
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{
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struct scpi_clk *sclk;
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struct scpi_clk_data *clk_data = data;
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unsigned int idx = clkspec->args[0], count;
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for (count = 0; count < clk_data->clk_num; count++) {
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sclk = clk_data->clk[count];
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if (idx == sclk->id)
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return &sclk->hw;
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}
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return ERR_PTR(-EINVAL);
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}
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static int scpi_clk_add(struct device *dev, struct device_node *np,
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const struct of_device_id *match)
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{
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int idx, count, err;
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struct scpi_clk_data *clk_data;
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count = of_property_count_strings(np, "clock-output-names");
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if (count < 0) {
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dev_err(dev, "%pOFn: invalid clock output count\n", np);
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return -EINVAL;
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}
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clk_data = devm_kmalloc(dev, sizeof(*clk_data), GFP_KERNEL);
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if (!clk_data)
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return -ENOMEM;
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clk_data->clk_num = count;
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clk_data->clk = devm_kcalloc(dev, count, sizeof(*clk_data->clk),
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GFP_KERNEL);
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if (!clk_data->clk)
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return -ENOMEM;
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for (idx = 0; idx < count; idx++) {
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struct scpi_clk *sclk;
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const char *name;
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u32 val;
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sclk = devm_kzalloc(dev, sizeof(*sclk), GFP_KERNEL);
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if (!sclk)
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return -ENOMEM;
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if (of_property_read_string_index(np, "clock-output-names",
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idx, &name)) {
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dev_err(dev, "invalid clock name @ %pOFn\n", np);
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return -EINVAL;
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}
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if (of_property_read_u32_index(np, "clock-indices",
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idx, &val)) {
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dev_err(dev, "invalid clock index @ %pOFn\n", np);
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return -EINVAL;
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}
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sclk->id = val;
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err = scpi_clk_ops_init(dev, match, sclk, name);
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if (err) {
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dev_err(dev, "failed to register clock '%s'\n", name);
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return err;
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}
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dev_dbg(dev, "Registered clock '%s'\n", name);
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clk_data->clk[idx] = sclk;
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}
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return of_clk_add_hw_provider(np, scpi_of_clk_src_get, clk_data);
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}
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static int scpi_clocks_remove(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *child, *np = dev->of_node;
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if (cpufreq_dev) {
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platform_device_unregister(cpufreq_dev);
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cpufreq_dev = NULL;
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}
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for_each_available_child_of_node(np, child)
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of_clk_del_provider(np);
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return 0;
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}
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static int scpi_clocks_probe(struct platform_device *pdev)
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{
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int ret;
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struct device *dev = &pdev->dev;
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struct device_node *child, *np = dev->of_node;
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const struct of_device_id *match;
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if (!get_scpi_ops())
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return -ENXIO;
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for_each_available_child_of_node(np, child) {
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match = of_match_node(scpi_clk_match, child);
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if (!match)
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continue;
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ret = scpi_clk_add(dev, child, match);
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if (ret) {
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scpi_clocks_remove(pdev);
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of_node_put(child);
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return ret;
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}
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if (match->data != &scpi_dvfs_ops)
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continue;
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/* Add the virtual cpufreq device if it's DVFS clock provider */
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cpufreq_dev = platform_device_register_simple("scpi-cpufreq",
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-1, NULL, 0);
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if (IS_ERR(cpufreq_dev))
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pr_warn("unable to register cpufreq device");
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}
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return 0;
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}
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static const struct of_device_id scpi_clocks_ids[] = {
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{ .compatible = "arm,scpi-clocks", },
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{}
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};
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MODULE_DEVICE_TABLE(of, scpi_clocks_ids);
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static struct platform_driver scpi_clocks_driver = {
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.driver = {
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.name = "scpi_clocks",
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.of_match_table = scpi_clocks_ids,
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},
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.probe = scpi_clocks_probe,
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.remove = scpi_clocks_remove,
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};
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module_platform_driver(scpi_clocks_driver);
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MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");
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MODULE_DESCRIPTION("ARM SCPI clock driver");
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MODULE_LICENSE("GPL v2");
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