linux_dsm_epyc7002/arch/arm/boot/dts/uniphier-pro4-ref.dts
Masahiro Yamada bc8841f0c1 ARM: dts: uniphier: update to new Denali NAND binding
With commit d8e8fd0ebf ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new controller/chip representation.

Update DT for it.

In the new binding, the number of connected chips are described in
DT instead of run-time probed.

I added just one chip to the reference boards, where we do not know
if the on-board NAND device is a single chip or multiple chips.
If we added too many chips into DT, it would end up with the timeout
error in nand_scan_ident().

I changed all the pinctrl properties to use the single CS.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-06-26 00:06:50 +09:00

106 lines
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Device Tree Source for UniPhier Pro4 Reference Board
//
// Copyright (C) 2015-2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-pro4.dtsi"
#include "uniphier-ref-daughter.dtsi"
#include "uniphier-support-card.dtsi"
/ {
model = "UniPhier Pro4 Reference Board";
compatible = "socionext,uniphier-pro4-ref", "socionext,uniphier-pro4";
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
serial0 = &serial0;
serial1 = &serial1;
serial2 = &serial2;
serial3 = &serial3;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c5 = &i2c5;
i2c6 = &i2c6;
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
};
&ethsc {
interrupts = <2 8>;
};
&serial0 {
status = "okay";
};
&serial1 {
status = "okay";
};
&serial2 {
status = "okay";
};
&gpio {
xirq2 {
gpio-hog;
gpios = <UNIPHIER_GPIO_IRQ(2) 0>;
input;
};
};
&i2c0 {
status = "okay";
};
&sd {
status = "okay";
};
&usb2 {
status = "okay";
};
&usb3 {
status = "okay";
};
&eth {
status = "okay";
phy-handle = <&ethphy>;
};
&mdio {
ethphy: ethphy@0 {
reg = <0>;
};
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};
&nand {
status = "okay";
nand@0 {
reg = <0>;
};
};