Jim Mattson 7e7596ea1a perf/x86/kvm: Add Cascade Lake Xeon steppings to isolation_ucodes[] ... [ Upstream commit b3c3361fe325074d4144c29d46daae4fc5a268d5 ] Cascade Lake Xeon parts have the same model number as Skylake Xeon parts, so they are tagged with the intel_pebs_isolation quirk. However, as with Skylake Xeon H0 stepping parts, the PEBS isolation issue is fixed in all microcode versions. Add the Cascade Lake Xeon steppings (5, 6, and 7) to the isolation_ucodes[] table so that these parts benefit from Andi's optimization in commit 9b545c04ab ("perf/x86/kvm: Avoid unnecessary work in guest filtering"). Signed-off-by: Jim Mattson <jmattson@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Andi Kleen <ak@linux.intel.com> Link: https://lkml.kernel.org/r/20210205191324.2889006-1-jmattson@google.com Signed-off-by: Sasha Levin <sashal@kernel.org>		2021-03-07 12:34:13 +01:00
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amd	x86/events/amd/iommu: Fix sizeof mismatch	2020-10-03 16:30:56 +02:00
intel	perf/x86/kvm: Add Cascade Lake Xeon steppings to isolation_ucodes[]	2021-03-07 12:34:13 +01:00
zhaoxin	x86/perf: Fix a typo	2020-07-22 10:22:08 +02:00
core.c	These are the performance events changes for v5.10:	2020-10-12 14:14:35 -07:00
Kconfig	treewide: replace '---help---' in Kconfig files with 'help'	2020-06-14 01:57:21 +09:00
Makefile	perf/x86/rapl: Fix RAPL config variable bug	2020-06-02 11:52:56 +02:00
msr.c	perf/x86/msr: Add Jasper Lake support	2020-09-29 09:57:02 +02:00
perf_event.h	perf/x86/intel: Make anythread filter support conditional	2020-11-09 18:12:36 +01:00
probe.c	perf/x86/rapl: Make perf_probe_msr() more robust and flexible	2020-05-28 07:58:55 +02:00
probe.h	perf/x86: Add MSR probe interface	2019-06-24 19:28:31 +02:00
rapl.c	perf/x86: fix sysfs type mismatches	2020-11-17 13:15:38 +01:00