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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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6fc2e83077
This patches fixes the LBR kernel crashes on Intel Atom.
The kernel was assuming that if the CPU supports 64-bit format
LBR, then it has an LBR_SELECT MSR. Atom uses 64-bit LBR format
but does not have LBR_SELECT. That was causing NULL pointer
dereferences in a couple of places.
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: kan.liang@intel.com
Fixes:
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||
|---|---|---|
| .. | ||
| mcheck | ||
| microcode | ||
| mtrr | ||
| .gitignore | ||
| amd.c | ||
| bugs_64.c | ||
| bugs.c | ||
| centaur.c | ||
| common.c | ||
| cpu.h | ||
| cyrix.c | ||
| hypervisor.c | ||
| intel_cacheinfo.c | ||
| intel_pt.h | ||
| intel.c | ||
| Makefile | ||
| match.c | ||
| mkcapflags.sh | ||
| mshyperv.c | ||
| perf_event_amd_ibs.c | ||
| perf_event_amd_iommu.c | ||
| perf_event_amd_iommu.h | ||
| perf_event_amd_uncore.c | ||
| perf_event_amd.c | ||
| perf_event_intel_bts.c | ||
| perf_event_intel_cqm.c | ||
| perf_event_intel_cstate.c | ||
| perf_event_intel_ds.c | ||
| perf_event_intel_lbr.c | ||
| perf_event_intel_pt.c | ||
| perf_event_intel_rapl.c | ||
| perf_event_intel_uncore_nhmex.c | ||
| perf_event_intel_uncore_snb.c | ||
| perf_event_intel_uncore_snbep.c | ||
| perf_event_intel_uncore.c | ||
| perf_event_intel_uncore.h | ||
| perf_event_intel.c | ||
| perf_event_knc.c | ||
| perf_event_msr.c | ||
| perf_event_p4.c | ||
| perf_event_p6.c | ||
| perf_event.c | ||
| perf_event.h | ||
| perfctr-watchdog.c | ||
| powerflags.c | ||
| proc.c | ||
| rdrand.c | ||
| scattered.c | ||
| topology.c | ||
| transmeta.c | ||
| umc.c | ||
| vmware.c | ||