mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-12 08:46:38 +07:00
6fa52ed33b
This is a rather large set of patches for device drivers that for one reason or another the subsystem maintainer preferred to get merged through the arm-soc tree. There are both new drivers as well as existing drivers that are getting converted from platform-specific code into standalone drivers using the appropriate subsystem specific interfaces. In particular, we can now have pinctrl, clk, clksource and irqchip drivers in one file per driver, without the need to call into platform specific interface, or to get called from platform specific code, as long as all information about the hardware is provided through a device tree. Most of the drivers we touch this time are for clocksource. Since now most of them are part of drivers/clocksource, I expect that we won't have to touch these again from arm-soc and can let the clocksource maintainers take care of these in the future. Another larger part of this series is specific to the exynos platform, which is seeing some significant effort in upstreaming and modernization of its device drivers this time around, which unfortunately is also the cause for the churn and a lot of the merge conflicts. There is one new subsystem that gets merged as part of this series: the reset controller interface, which is a very simple interface for taking devices on the SoC out of reset or back into reset. Patches to use this interface on i.MX follow later in this merge window, and we are going to have other platforms (at least tegra and sirf) get converted in 3.11. This will let us get rid of platform specific callbacks in a number of platform independent device drivers. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJRhKUsAAoJEIwa5zzehBx3Ug4P/RqEen15hxS/NY8SIVRAU5c0 G9ZiSPcLmvXGR/t1RZFeLWKaKOYRb2oW1EbXrlkddprkmg85RuQE/KMpCgzPPhVC Yrs8UaagMGblaLOjwavVjin/CUXZokRdMfsQoIyMGOezmVGFnv4d4Kt64IOf35DF 24vDv/QO0BAI9k6m6WLqlWvSshb0IkW8r2LneRLnMEAVop7b1xkOxz0sR6l0LWfV 6JAMXyTjJMg0t8uCVW/QyNdxcxINHhV4SYcNkzF3EZ7ol50OiJsT9fg0XW759+Wb vlX6Xuehg+CBOg+g3ZOZuR8JOEkOhAGRSzuJkk/TmLCCxc+ghnuYz8HArxh6GMHK KaxvogLIi0ZsD94A/BZIKkDtOLWlzdz2HBrYo9PTz8zrOz/gXhwQ3zq0jPccC5E0 S+YYiobCBXepknF9301ti7wGD9VDzI8nmqOKG6tEBrD3xuO+RoBv+z4pBugN4/1C DlB19gOz60G5kniziL+wlmWER2qXmYrQZqS+s6+B2XoyoETC0Yij3Rck5vyC6qIK A2sni+Y9rzNOB9nzmnISP/UiGUffCy8AV4DZJjMSl0XkF4cpOXqRVGZ2nGB4tR5q GTOETcDCo5dvMDKX7Wfrz40CQzO39tnPCddg3OIS93ZwMpCeykIlb1FVL7RcsyF7 3uikzYHlDo3C5pvtJ5TS =ZWk9 -----END PGP SIGNATURE----- Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver changes from Olof Johansson: "This is a rather large set of patches for device drivers that for one reason or another the subsystem maintainer preferred to get merged through the arm-soc tree. There are both new drivers as well as existing drivers that are getting converted from platform-specific code into standalone drivers using the appropriate subsystem specific interfaces. In particular, we can now have pinctrl, clk, clksource and irqchip drivers in one file per driver, without the need to call into platform specific interface, or to get called from platform specific code, as long as all information about the hardware is provided through a device tree. Most of the drivers we touch this time are for clocksource. Since now most of them are part of drivers/clocksource, I expect that we won't have to touch these again from arm-soc and can let the clocksource maintainers take care of these in the future. Another larger part of this series is specific to the exynos platform, which is seeing some significant effort in upstreaming and modernization of its device drivers this time around, which unfortunately is also the cause for the churn and a lot of the merge conflicts. There is one new subsystem that gets merged as part of this series: the reset controller interface, which is a very simple interface for taking devices on the SoC out of reset or back into reset. Patches to use this interface on i.MX follow later in this merge window, and we are going to have other platforms (at least tegra and sirf) get converted in 3.11. This will let us get rid of platform specific callbacks in a number of platform independent device drivers." * tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (256 commits) irqchip: s3c24xx: add missing __init annotations ARM: dts: Disable the RTC by default on exynos5 clk: exynos5250: Fix parent clock for sclk_mmc{0,1,2,3} ARM: exynos: restore mach/regs-clock.h for exynos5 clocksource: exynos_mct: fix build error on non-DT pinctrl: vt8500: wmt: Fix checking return value of pinctrl_register() irqchip: vt8500: Convert arch-vt8500 to new irqchip infrastructure reset: NULL deref on allocation failure reset: Add reset controller API dt: describe base reset signal binding ARM: EXYNOS: Add arm-pmu DT binding for exynos421x ARM: EXYNOS: Add arm-pmu DT binding for exynos5250 ARM: EXYNOS: Enable PMUs for exynos4 irqchip: exynos-combiner: Correct combined IRQs for exynos4 irqchip: exynos-combiner: Add set_irq_affinity function for combiner_irq ARM: EXYNOS: fix compilation error introduced due to common clock migration clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3} clk: exynos4: export clocks required for fimc-is clk: samsung: Fix compilation error clk: tegra: fix enum tegra114_clk to match binding ...
303 lines
8.0 KiB
C
303 lines
8.0 KiB
C
/*
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* Header for code common to all OMAP2+ machines.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
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#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
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#ifndef __ASSEMBLER__
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/i2c/twl.h>
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#include <linux/i2c-omap.h>
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#include <asm/proc-fns.h>
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#include "i2c.h"
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#include "serial.h"
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#include "usb.h"
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#define OMAP_INTC_START NR_IRQS
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#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
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int omap2_pm_init(void);
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#else
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static inline int omap2_pm_init(void)
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{
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return 0;
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}
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#endif
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#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
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int omap3_pm_init(void);
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#else
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static inline int omap3_pm_init(void)
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{
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return 0;
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}
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#endif
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#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
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int omap4_pm_init(void);
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#else
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static inline int omap4_pm_init(void)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_OMAP_MUX
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int omap_mux_late_init(void);
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#else
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static inline int omap_mux_late_init(void)
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{
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return 0;
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}
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#endif
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extern void omap2_init_common_infrastructure(void);
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extern void omap2_sync32k_timer_init(void);
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extern void omap3_sync32k_timer_init(void);
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extern void omap3_secure_sync32k_timer_init(void);
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extern void omap3_gptimer_timer_init(void);
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extern void omap4_local_timer_init(void);
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extern void omap5_realtime_timer_init(void);
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void omap2420_init_early(void);
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void omap2430_init_early(void);
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void omap3430_init_early(void);
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void omap35xx_init_early(void);
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void omap3630_init_early(void);
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void omap3_init_early(void); /* Do not use this one */
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void am33xx_init_early(void);
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void am35xx_init_early(void);
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void ti81xx_init_early(void);
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void am33xx_init_early(void);
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void omap4430_init_early(void);
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void omap5_init_early(void);
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void omap3_init_late(void); /* Do not use this one */
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void omap4430_init_late(void);
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void omap2420_init_late(void);
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void omap2430_init_late(void);
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void omap3430_init_late(void);
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void omap35xx_init_late(void);
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void omap3630_init_late(void);
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void am35xx_init_late(void);
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void ti81xx_init_late(void);
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int omap2_common_pm_late_init(void);
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#ifdef CONFIG_SOC_BUS
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void omap_soc_device_init(void);
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#else
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static inline void omap_soc_device_init(void)
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{
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}
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#endif
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#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
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void omap2xxx_restart(char mode, const char *cmd);
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#else
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static inline void omap2xxx_restart(char mode, const char *cmd)
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{
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}
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#endif
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#ifdef CONFIG_SOC_AM33XX
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void am33xx_restart(char mode, const char *cmd);
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#else
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static inline void am33xx_restart(char mode, const char *cmd)
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{
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}
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#endif
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#ifdef CONFIG_ARCH_OMAP3
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void omap3xxx_restart(char mode, const char *cmd);
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#else
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static inline void omap3xxx_restart(char mode, const char *cmd)
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{
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
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void omap44xx_restart(char mode, const char *cmd);
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#else
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static inline void omap44xx_restart(char mode, const char *cmd)
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{
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}
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#endif
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/* This gets called from mach-omap2/io.c, do not call this */
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void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
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void __init omap242x_map_io(void);
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void __init omap243x_map_io(void);
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void __init omap3_map_io(void);
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void __init am33xx_map_io(void);
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void __init omap4_map_io(void);
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void __init omap5_map_io(void);
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void __init ti81xx_map_io(void);
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/* omap_barriers_init() is OMAP4 only */
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void omap_barriers_init(void);
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/**
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* omap_test_timeout - busy-loop, testing a condition
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* @cond: condition to test until it evaluates to true
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* @timeout: maximum number of microseconds in the timeout
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* @index: loop index (integer)
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*
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* Loop waiting for @cond to become true or until at least @timeout
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* microseconds have passed. To use, define some integer @index in the
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* calling code. After running, if @index == @timeout, then the loop has
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* timed out.
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*/
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#define omap_test_timeout(cond, timeout, index) \
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({ \
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for (index = 0; index < timeout; index++) { \
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if (cond) \
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break; \
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udelay(1); \
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} \
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})
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extern struct device *omap2_get_mpuss_device(void);
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extern struct device *omap2_get_iva_device(void);
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extern struct device *omap2_get_l3_device(void);
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extern struct device *omap4_get_dsp_device(void);
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void omap2_init_irq(void);
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void omap3_init_irq(void);
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void ti81xx_init_irq(void);
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extern int omap_irq_pending(void);
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void omap_intc_save_context(void);
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void omap_intc_restore_context(void);
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void omap3_intc_suspend(void);
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void omap3_intc_prepare_idle(void);
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void omap3_intc_resume_idle(void);
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void omap2_intc_handle_irq(struct pt_regs *regs);
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void omap3_intc_handle_irq(struct pt_regs *regs);
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void omap_intc_of_init(void);
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void omap_gic_of_init(void);
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#ifdef CONFIG_CACHE_L2X0
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extern void __iomem *omap4_get_l2cache_base(void);
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#endif
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struct device_node;
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#ifdef CONFIG_OF
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int __init intc_of_init(struct device_node *node,
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struct device_node *parent);
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#else
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int __init intc_of_init(struct device_node *node,
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struct device_node *parent)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_SMP
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extern void __iomem *omap4_get_scu_base(void);
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#else
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static inline void __iomem *omap4_get_scu_base(void)
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{
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return NULL;
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}
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#endif
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extern void __init gic_init_irq(void);
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extern void gic_dist_disable(void);
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extern bool gic_dist_disabled(void);
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extern void gic_timer_retrigger(void);
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extern void omap_smc1(u32 fn, u32 arg);
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extern void __iomem *omap4_get_sar_ram_base(void);
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extern void omap_do_wfi(void);
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#ifdef CONFIG_SMP
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/* Needed for secondary core boot */
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extern void omap_secondary_startup(void);
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extern void omap_secondary_startup_4460(void);
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extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
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extern void omap_auxcoreboot_addr(u32 cpu_addr);
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extern u32 omap_read_auxcoreboot0(void);
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extern void omap4_cpu_die(unsigned int cpu);
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extern struct smp_operations omap4_smp_ops;
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extern void omap5_secondary_startup(void);
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#endif
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#if defined(CONFIG_SMP) && defined(CONFIG_PM)
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extern int omap4_mpuss_init(void);
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extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
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extern int omap4_finish_suspend(unsigned long cpu_state);
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extern void omap4_cpu_resume(void);
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extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
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#else
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static inline int omap4_enter_lowpower(unsigned int cpu,
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unsigned int power_state)
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{
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cpu_do_idle();
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return 0;
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}
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static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
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{
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cpu_do_idle();
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return 0;
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}
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static inline int omap4_mpuss_init(void)
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{
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return 0;
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}
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static inline int omap4_finish_suspend(unsigned long cpu_state)
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{
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return 0;
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}
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static inline void omap4_cpu_resume(void)
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{}
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#endif
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struct omap_sdrc_params;
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extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
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struct omap_sdrc_params *sdrc_cs1);
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struct omap2_hsmmc_info;
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extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
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extern void omap_reserve(void);
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struct omap_hwmod;
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extern int omap_dss_reset(struct omap_hwmod *);
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/* SoC specific clock initializer */
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extern int (*omap_clk_init)(void);
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#endif /* __ASSEMBLER__ */
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#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
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