mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 08:45:12 +07:00
b1cb86ae0e
Rename the pad to sw_data as per description of this field in the hardware spec(refer sprugr9 from www.ti.com). Latest version of the document is at http://www.ti.com/lit/ug/sprugr9h/sprugr9h.pdf and section 3.1 Host Packet Descriptor describes this field. Define and use a constant for the size of sw_data field similar to other fields in the struct for desc and document the sw_data field in the header. As the sw_data is not touched by hw, it's type can be changed to u32. Rename the helpers to match with the updated dma desc field sw_data. Cc: Wingman Kwok <w-kwok2@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Grygorii Strashko <grygorii.strashko@ti.com> CC: David Laight <David.Laight@ACULAB.COM> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: David S. Miller <davem@davemloft.net>
178 lines
5.2 KiB
C
178 lines
5.2 KiB
C
/*
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* Copyright (C) 2014 Texas Instruments Incorporated
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* Authors: Sandeep Nair <sandeep_n@ti.com
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* Cyril Chemparathy <cyril@ti.com
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Santosh Shilimkar <santosh.shilimkar@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __SOC_TI_KEYSTONE_NAVIGATOR_DMA_H__
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#define __SOC_TI_KEYSTONE_NAVIGATOR_DMA_H__
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/*
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* PKTDMA descriptor manipulation macros for host packet descriptor
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*/
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#define MASK(x) (BIT(x) - 1)
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#define KNAV_DMA_DESC_PKT_LEN_MASK MASK(22)
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#define KNAV_DMA_DESC_PKT_LEN_SHIFT 0
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#define KNAV_DMA_DESC_PS_INFO_IN_SOP BIT(22)
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#define KNAV_DMA_DESC_PS_INFO_IN_DESC 0
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#define KNAV_DMA_DESC_TAG_MASK MASK(8)
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#define KNAV_DMA_DESC_SAG_HI_SHIFT 24
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#define KNAV_DMA_DESC_STAG_LO_SHIFT 16
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#define KNAV_DMA_DESC_DTAG_HI_SHIFT 8
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#define KNAV_DMA_DESC_DTAG_LO_SHIFT 0
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#define KNAV_DMA_DESC_HAS_EPIB BIT(31)
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#define KNAV_DMA_DESC_NO_EPIB 0
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#define KNAV_DMA_DESC_PSLEN_SHIFT 24
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#define KNAV_DMA_DESC_PSLEN_MASK MASK(6)
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#define KNAV_DMA_DESC_ERR_FLAG_SHIFT 20
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#define KNAV_DMA_DESC_ERR_FLAG_MASK MASK(4)
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#define KNAV_DMA_DESC_PSFLAG_SHIFT 16
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#define KNAV_DMA_DESC_PSFLAG_MASK MASK(4)
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#define KNAV_DMA_DESC_RETQ_SHIFT 0
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#define KNAV_DMA_DESC_RETQ_MASK MASK(14)
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#define KNAV_DMA_DESC_BUF_LEN_MASK MASK(22)
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#define KNAV_DMA_NUM_EPIB_WORDS 4
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#define KNAV_DMA_NUM_PS_WORDS 16
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#define KNAV_DMA_NUM_SW_DATA_WORDS 4
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#define KNAV_DMA_FDQ_PER_CHAN 4
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/* Tx channel scheduling priority */
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enum knav_dma_tx_priority {
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DMA_PRIO_HIGH = 0,
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DMA_PRIO_MED_H,
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DMA_PRIO_MED_L,
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DMA_PRIO_LOW
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};
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/* Rx channel error handling mode during buffer starvation */
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enum knav_dma_rx_err_mode {
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DMA_DROP = 0,
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DMA_RETRY
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};
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/* Rx flow size threshold configuration */
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enum knav_dma_rx_thresholds {
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DMA_THRESH_NONE = 0,
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DMA_THRESH_0 = 1,
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DMA_THRESH_0_1 = 3,
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DMA_THRESH_0_1_2 = 7
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};
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/* Descriptor type */
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enum knav_dma_desc_type {
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DMA_DESC_HOST = 0,
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DMA_DESC_MONOLITHIC = 2
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};
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/**
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* struct knav_dma_tx_cfg: Tx channel configuration
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* @filt_einfo: Filter extended packet info
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* @filt_pswords: Filter PS words present
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* @knav_dma_tx_priority: Tx channel scheduling priority
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*/
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struct knav_dma_tx_cfg {
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bool filt_einfo;
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bool filt_pswords;
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enum knav_dma_tx_priority priority;
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};
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/**
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* struct knav_dma_rx_cfg: Rx flow configuration
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* @einfo_present: Extended packet info present
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* @psinfo_present: PS words present
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* @knav_dma_rx_err_mode: Error during buffer starvation
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* @knav_dma_desc_type: Host or Monolithic desc
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* @psinfo_at_sop: PS word located at start of packet
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* @sop_offset: Start of packet offset
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* @dst_q: Destination queue for a given flow
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* @thresh: Rx flow size threshold
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* @fdq[]: Free desc Queue array
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* @sz_thresh0: RX packet size threshold 0
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* @sz_thresh1: RX packet size threshold 1
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* @sz_thresh2: RX packet size threshold 2
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*/
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struct knav_dma_rx_cfg {
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bool einfo_present;
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bool psinfo_present;
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enum knav_dma_rx_err_mode err_mode;
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enum knav_dma_desc_type desc_type;
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bool psinfo_at_sop;
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unsigned int sop_offset;
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unsigned int dst_q;
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enum knav_dma_rx_thresholds thresh;
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unsigned int fdq[KNAV_DMA_FDQ_PER_CHAN];
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unsigned int sz_thresh0;
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unsigned int sz_thresh1;
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unsigned int sz_thresh2;
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};
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/**
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* struct knav_dma_cfg: Pktdma channel configuration
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* @sl_cfg: Slave configuration
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* @tx: Tx channel configuration
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* @rx: Rx flow configuration
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*/
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struct knav_dma_cfg {
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enum dma_transfer_direction direction;
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union {
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struct knav_dma_tx_cfg tx;
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struct knav_dma_rx_cfg rx;
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} u;
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};
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/**
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* struct knav_dma_desc: Host packet descriptor layout
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* @desc_info: Descriptor information like id, type, length
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* @tag_info: Flow tag info written in during RX
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* @packet_info: Queue Manager, policy, flags etc
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* @buff_len: Buffer length in bytes
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* @buff: Buffer pointer
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* @next_desc: For chaining the descriptors
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* @orig_len: length since 'buff_len' can be overwritten
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* @orig_buff: buff pointer since 'buff' can be overwritten
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* @epib: Extended packet info block
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* @psdata: Protocol specific
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* @sw_data: Software private data not touched by h/w
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*/
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struct knav_dma_desc {
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__le32 desc_info;
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__le32 tag_info;
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__le32 packet_info;
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__le32 buff_len;
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__le32 buff;
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__le32 next_desc;
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__le32 orig_len;
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__le32 orig_buff;
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__le32 epib[KNAV_DMA_NUM_EPIB_WORDS];
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__le32 psdata[KNAV_DMA_NUM_PS_WORDS];
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u32 sw_data[KNAV_DMA_NUM_SW_DATA_WORDS];
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} ____cacheline_aligned;
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#if IS_ENABLED(CONFIG_KEYSTONE_NAVIGATOR_DMA)
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void *knav_dma_open_channel(struct device *dev, const char *name,
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struct knav_dma_cfg *config);
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void knav_dma_close_channel(void *channel);
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#else
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static inline void *knav_dma_open_channel(struct device *dev, const char *name,
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struct knav_dma_cfg *config)
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{
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return (void *) NULL;
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}
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static inline void knav_dma_close_channel(void *channel)
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{}
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#endif
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#endif /* __SOC_TI_KEYSTONE_NAVIGATOR_DMA_H__ */
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