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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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1a2f1395af
Include memory node unit name in order to fix the following W=1 warnings: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
410 lines
9.4 KiB
Plaintext
410 lines
9.4 KiB
Plaintext
/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "vf610.dtsi"
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/ {
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model = "VF610 Tower Board";
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compatible = "fsl,vf610-twr", "fsl,vf610";
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chosen {
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bootargs = "console=ttyLP1,115200";
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};
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memory@80000000 {
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reg = <0x80000000 0x8000000>;
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};
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audio_ext: mclk_osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24576000>;
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};
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enet_ext: eth_osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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reg_3p3v: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_vcc_3v3_mcu: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "vcc_3v3_mcu";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,widgets =
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"Microphone", "Microphone Jack",
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"Headphone", "Headphone Jack",
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"Speaker", "Speaker Ext",
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"Line", "Line In Jack";
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simple-audio-card,routing =
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"MIC_IN", "Microphone Jack",
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"Microphone Jack", "Mic Bias",
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"LINE_IN", "Line In Jack",
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"Headphone Jack", "HP_OUT",
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"Speaker Ext", "LINE_OUT";
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simple-audio-card,cpu {
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sound-dai = <&sai2>;
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frame-master;
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bitclock-master;
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};
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simple-audio-card,codec {
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sound-dai = <&codec>;
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frame-master;
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bitclock-master;
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};
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};
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};
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&adc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_adc0_ad5>;
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vref-supply = <®_vcc_3v3_mcu>;
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status = "okay";
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};
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&clks {
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clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>;
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clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext";
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assigned-clocks = <&clks VF610_CLK_ENET_SEL>,
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<&clks VF610_CLK_ENET_TS_SEL>;
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assigned-clock-parents = <&clks VF610_CLK_ENET_EXT>,
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<&clks VF610_CLK_ENET_EXT>;
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};
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&dspi0 {
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bus-num = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dspi0>;
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status = "okay";
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sflash: at26df081a@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at26df081a";
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spi-max-frequency = <16000000>;
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spi-cpol;
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spi-cpha;
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reg = <0>;
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};
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};
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&edma0 {
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status = "okay";
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};
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&esdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc1>;
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bus-width = <4>;
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cd-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&fec0 {
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phy-mode = "rmii";
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phy-handle = <ðphy0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec0>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@0 {
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reg = <0>;
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};
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ethphy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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};
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&fec1 {
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phy-mode = "rmii";
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phy-handle = <ðphy1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec1>;
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status = "okay";
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};
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&i2c0 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c0>;
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status = "okay";
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codec: sgtl5000@a {
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#sound-dai-cells = <0>;
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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VDDA-supply = <®_3p3v>;
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VDDIO-supply = <®_3p3v>;
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clocks = <&clks VF610_CLK_SAI2>;
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};
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};
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&iomuxc {
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vf610-twr {
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pinctrl_adc0_ad5: adc0ad5grp {
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fsl,pins = <
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VF610_PAD_PTC30__ADC0_SE5 0xa1
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>;
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};
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pinctrl_dspi0: dspi0grp {
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fsl,pins = <
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VF610_PAD_PTB19__DSPI0_CS0 0x1182
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VF610_PAD_PTB20__DSPI0_SIN 0x1181
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VF610_PAD_PTB21__DSPI0_SOUT 0x1182
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VF610_PAD_PTB22__DSPI0_SCK 0x1182
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>;
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};
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pinctrl_esdhc1: esdhc1grp {
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fsl,pins = <
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VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
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VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
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VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
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VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
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VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
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VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
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VF610_PAD_PTA7__GPIO_134 0x219d
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>;
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};
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pinctrl_fec0: fec0grp {
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fsl,pins = <
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VF610_PAD_PTA6__RMII_CLKIN 0x30d1
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VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d3
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VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d1
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VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1
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VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1
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VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1
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VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1
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VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2
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VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2
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VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2
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>;
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};
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pinctrl_fec1: fec1grp {
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fsl,pins = <
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VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2
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VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
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VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
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VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1
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VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1
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VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1
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VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
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VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2
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VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2
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>;
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};
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pinctrl_i2c0: i2c0grp {
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fsl,pins = <
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VF610_PAD_PTB14__I2C0_SCL 0x30d3
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VF610_PAD_PTB15__I2C0_SDA 0x30d3
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>;
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};
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pinctrl_nfc: nfcgrp {
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fsl,pins = <
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VF610_PAD_PTD31__NF_IO15 0x28df
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VF610_PAD_PTD30__NF_IO14 0x28df
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VF610_PAD_PTD29__NF_IO13 0x28df
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VF610_PAD_PTD28__NF_IO12 0x28df
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VF610_PAD_PTD27__NF_IO11 0x28df
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VF610_PAD_PTD26__NF_IO10 0x28df
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VF610_PAD_PTD25__NF_IO9 0x28df
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VF610_PAD_PTD24__NF_IO8 0x28df
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VF610_PAD_PTD23__NF_IO7 0x28df
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VF610_PAD_PTD22__NF_IO6 0x28df
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VF610_PAD_PTD21__NF_IO5 0x28df
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VF610_PAD_PTD20__NF_IO4 0x28df
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VF610_PAD_PTD19__NF_IO3 0x28df
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VF610_PAD_PTD18__NF_IO2 0x28df
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VF610_PAD_PTD17__NF_IO1 0x28df
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VF610_PAD_PTD16__NF_IO0 0x28df
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VF610_PAD_PTB24__NF_WE_B 0x28c2
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VF610_PAD_PTB25__NF_CE0_B 0x28c2
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VF610_PAD_PTB27__NF_RE_B 0x28c2
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VF610_PAD_PTC26__NF_RB_B 0x283d
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VF610_PAD_PTC27__NF_ALE 0x28c2
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VF610_PAD_PTC28__NF_CLE 0x28c2
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>;
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};
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pinctrl_pwm0: pwm0grp {
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fsl,pins = <
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VF610_PAD_PTB0__FTM0_CH0 0x1582
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VF610_PAD_PTB1__FTM0_CH1 0x1582
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VF610_PAD_PTB2__FTM0_CH2 0x1582
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VF610_PAD_PTB3__FTM0_CH3 0x1582
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>;
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};
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pinctrl_sai2: sai2grp {
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fsl,pins = <
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VF610_PAD_PTA16__SAI2_TX_BCLK 0x02ed
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VF610_PAD_PTA18__SAI2_TX_DATA 0x02ee
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VF610_PAD_PTA19__SAI2_TX_SYNC 0x02ed
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VF610_PAD_PTA21__SAI2_RX_BCLK 0x02ed
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VF610_PAD_PTA22__SAI2_RX_DATA 0x02ed
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VF610_PAD_PTA23__SAI2_RX_SYNC 0x02ed
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VF610_PAD_PTB18__EXT_AUDIO_MCLK 0x02ed
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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VF610_PAD_PTB4__UART1_TX 0x21a2
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VF610_PAD_PTB5__UART1_RX 0x21a1
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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VF610_PAD_PTB6__UART2_TX 0x21a2
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VF610_PAD_PTB7__UART2_RX 0x21a1
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>;
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};
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};
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};
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&nfc {
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assigned-clocks = <&clks VF610_CLK_NFC>;
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assigned-clock-rates = <33000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nfc>;
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status = "okay";
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nand@0 {
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compatible = "fsl,vf610-nfc-nandcs";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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nand-bus-width = <16>;
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nand-ecc-mode = "hw";
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nand-ecc-strength = <24>;
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nand-ecc-step-size = <2048>;
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nand-on-flash-bbt;
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};
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};
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&pwm0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm0>;
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status = "okay";
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};
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&sai2 {
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#sound-dai-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai2>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&usbdev0 {
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disable-over-current;
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status = "okay";
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};
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&usbh1 {
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disable-over-current;
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status = "okay";
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};
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&usbmisc0 {
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status = "okay";
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};
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&usbmisc1 {
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status = "okay";
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};
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&usbphy0 {
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status = "okay";
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};
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&usbphy1 {
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status = "okay";
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};
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