mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
f43194c144
Marvell PPv2.2 controller present on CP-110 need the extra "mg_core_clk"
clock to avoid system hangs when powering some network interfaces up.
This issue appeared after a recent clock rework on Armada 7K/8K platforms.
This commit adds the new clock and updates the documentation accordingly.
[gregory.clement: use the real first commit to fix and add the cc:stable
flag]
Fixes: e3af9f7c6e ("RM64: dts: marvell: armada-cp110: Fix clock resources for various node")
Cc: <stable@vger.kernel.org>
Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
123 lines
3.9 KiB
Plaintext
123 lines
3.9 KiB
Plaintext
* Marvell Armada 375 Ethernet Controller (PPv2.1)
|
|
Marvell Armada 7K/8K Ethernet Controller (PPv2.2)
|
|
|
|
Required properties:
|
|
|
|
- compatible: should be one of:
|
|
"marvell,armada-375-pp2"
|
|
"marvell,armada-7k-pp2"
|
|
- reg: addresses and length of the register sets for the device.
|
|
For "marvell,armada-375-pp2", must contain the following register
|
|
sets:
|
|
- common controller registers
|
|
- LMS registers
|
|
- one register area per Ethernet port
|
|
For "marvell,armada-7k-pp2", must contain the following register
|
|
sets:
|
|
- packet processor registers
|
|
- networking interfaces registers
|
|
|
|
- clocks: pointers to the reference clocks for this device, consequently:
|
|
- main controller clock (for both armada-375-pp2 and armada-7k-pp2)
|
|
- GOP clock (for both armada-375-pp2 and armada-7k-pp2)
|
|
- MG clock (only for armada-7k-pp2)
|
|
- MG Core clock (only for armada-7k-pp2)
|
|
- AXI clock (only for armada-7k-pp2)
|
|
- clock-names: names of used clocks, must be "pp_clk", "gop_clk", "mg_clk",
|
|
"mg_core_clk" and "axi_clk" (the 3 latter only for armada-7k-pp2).
|
|
|
|
The ethernet ports are represented by subnodes. At least one port is
|
|
required.
|
|
|
|
Required properties (port):
|
|
|
|
- interrupts: interrupt for the port
|
|
- port-id: ID of the port from the MAC point of view
|
|
- gop-port-id: only for marvell,armada-7k-pp2, ID of the port from the
|
|
GOP (Group Of Ports) point of view. This ID is used to index the
|
|
per-port registers in the second register area.
|
|
- phy-mode: See ethernet.txt file in the same directory
|
|
|
|
Optional properties (port):
|
|
|
|
- marvell,loopback: port is loopback mode
|
|
- phy: a phandle to a phy node defining the PHY address (as the reg
|
|
property, a single integer).
|
|
- interrupt-names: if more than a single interrupt for rx is given, must
|
|
be the name associated to the interrupts listed. Valid
|
|
names are: "tx-cpu0", "tx-cpu1", "tx-cpu2", "tx-cpu3",
|
|
"rx-shared", "link".
|
|
- marvell,system-controller: a phandle to the system controller.
|
|
|
|
Example for marvell,armada-375-pp2:
|
|
|
|
ethernet@f0000 {
|
|
compatible = "marvell,armada-375-pp2";
|
|
reg = <0xf0000 0xa000>,
|
|
<0xc0000 0x3060>,
|
|
<0xc4000 0x100>,
|
|
<0xc5000 0x100>;
|
|
clocks = <&gateclk 3>, <&gateclk 19>;
|
|
clock-names = "pp_clk", "gop_clk";
|
|
|
|
eth0: eth0@c4000 {
|
|
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
|
|
port-id = <0>;
|
|
phy = <&phy0>;
|
|
phy-mode = "gmii";
|
|
};
|
|
|
|
eth1: eth1@c5000 {
|
|
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
|
|
port-id = <1>;
|
|
phy = <&phy3>;
|
|
phy-mode = "gmii";
|
|
};
|
|
};
|
|
|
|
Example for marvell,armada-7k-pp2:
|
|
|
|
cpm_ethernet: ethernet@0 {
|
|
compatible = "marvell,armada-7k-pp22";
|
|
reg = <0x0 0x100000>, <0x129000 0xb000>;
|
|
clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>,
|
|
<&cpm_syscon0 1 5>, <&cpm_syscon0 1 6>, <&cpm_syscon0 1 18>;
|
|
clock-names = "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk";
|
|
|
|
eth0: eth0 {
|
|
interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 43 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 47 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 51 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 55 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
|
|
"tx-cpu3", "rx-shared";
|
|
port-id = <0>;
|
|
gop-port-id = <0>;
|
|
};
|
|
|
|
eth1: eth1 {
|
|
interrupts = <ICU_GRP_NSR 40 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 44 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 48 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 52 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 56 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
|
|
"tx-cpu3", "rx-shared";
|
|
port-id = <1>;
|
|
gop-port-id = <2>;
|
|
};
|
|
|
|
eth2: eth2 {
|
|
interrupts = <ICU_GRP_NSR 41 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 45 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 49 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 53 IRQ_TYPE_LEVEL_HIGH>,
|
|
<ICU_GRP_NSR 57 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
|
|
"tx-cpu3", "rx-shared";
|
|
port-id = <2>;
|
|
gop-port-id = <3>;
|
|
};
|
|
};
|