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d2a1606c29
The patch enables the HiSi LPC node for hip07, with the IPMI child device. Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
95 lines
1.3 KiB
Plaintext
95 lines
1.3 KiB
Plaintext
/**
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* dts file for Hisilicon D05 Development Board
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*
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* Copyright (C) 2016 Hisilicon Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* publishhed by the Free Software Foundation.
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*
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*/
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/dts-v1/;
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#include "hip07.dtsi"
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/ {
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model = "Hisilicon Hip07 D05 Development Board";
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compatible = "hisilicon,hip07-d05";
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/* the mem node will be updated by UEFI. */
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x00000000 0x0 0x40000000>;
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numa-node-id = <0>;
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};
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distance-map {
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compatible = "numa-distance-map-v1";
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distance-matrix = <0 0 10>,
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<0 1 15>,
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<0 2 20>,
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<0 3 25>,
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<1 0 15>,
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<1 1 10>,
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<1 2 25>,
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<1 3 30>,
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<2 0 20>,
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<2 1 25>,
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<2 2 10>,
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<2 3 15>,
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<3 0 25>,
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<3 1 30>,
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<3 2 15>,
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<3 3 10>;
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};
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&uart0 {
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status = "ok";
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};
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&ipmi0 {
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status = "ok";
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};
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&usb_ohci {
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status = "ok";
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};
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&usb_ehci {
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status = "ok";
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};
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ð0 {
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status = "ok";
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};
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ð1 {
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status = "ok";
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};
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ð2 {
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status = "ok";
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};
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ð3 {
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status = "ok";
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};
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&sas1 {
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status = "ok";
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};
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&p0_pcie2_a {
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status = "ok";
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};
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