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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 01:00:58 +07:00
a8b0ca17b8
The nmi parameter indicated if we could do wakeups from the current context, if not, we would set some state and self-IPI and let the resulting interrupt do the wakeup. For the various event classes: - hardware: nmi=0; PMI is in fact an NMI or we run irq_work_run from the PMI-tail (ARM etc.) - tracepoint: nmi=0; since tracepoint could be from NMI context. - software: nmi=[0,1]; some, like the schedule thing cannot perform wakeups, and hence need 0. As one can see, there is very little nmi=1 usage, and the down-side of not using it is that on some platforms some software events can have a jiffy delay in wakeup (when arch_irq_work_raise isn't implemented). The up-side however is that we can remove the nmi parameter and save a bunch of conditionals in fast paths. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Michael Cree <mcree@orcon.net.nz> Cc: Will Deacon <will.deacon@arm.com> Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com> Cc: Anton Blanchard <anton@samba.org> Cc: Eric B Munson <emunson@mgebm.net> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: David S. Miller <davem@davemloft.net> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Jason Wessel <jason.wessel@windriver.com> Cc: Don Zickus <dzickus@redhat.com> Link: http://lkml.kernel.org/n/tip-agjev8eu666tvknpb3iaj0fg@git.kernel.org Signed-off-by: Ingo Molnar <mingo@elte.hu>
501 lines
13 KiB
C
501 lines
13 KiB
C
/*
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* arch/sparc64/mm/fault.c: Page fault handlers for the 64-bit Sparc.
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*
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* Copyright (C) 1996, 2008 David S. Miller (davem@davemloft.net)
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* Copyright (C) 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz)
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*/
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#include <asm/head.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/sched.h>
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#include <linux/ptrace.h>
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#include <linux/mman.h>
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#include <linux/signal.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/perf_event.h>
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#include <linux/interrupt.h>
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#include <linux/kprobes.h>
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#include <linux/kdebug.h>
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#include <linux/percpu.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/openprom.h>
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#include <asm/oplib.h>
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#include <asm/uaccess.h>
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#include <asm/asi.h>
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#include <asm/lsu.h>
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#include <asm/sections.h>
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#include <asm/mmu_context.h>
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int show_unhandled_signals = 1;
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static inline __kprobes int notify_page_fault(struct pt_regs *regs)
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{
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int ret = 0;
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/* kprobe_running() needs smp_processor_id() */
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if (kprobes_built_in() && !user_mode(regs)) {
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preempt_disable();
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if (kprobe_running() && kprobe_fault_handler(regs, 0))
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ret = 1;
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preempt_enable();
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}
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return ret;
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}
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static void __kprobes unhandled_fault(unsigned long address,
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struct task_struct *tsk,
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struct pt_regs *regs)
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{
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if ((unsigned long) address < PAGE_SIZE) {
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printk(KERN_ALERT "Unable to handle kernel NULL "
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"pointer dereference\n");
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} else {
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printk(KERN_ALERT "Unable to handle kernel paging request "
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"at virtual address %016lx\n", (unsigned long)address);
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}
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printk(KERN_ALERT "tsk->{mm,active_mm}->context = %016lx\n",
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(tsk->mm ?
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CTX_HWBITS(tsk->mm->context) :
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CTX_HWBITS(tsk->active_mm->context)));
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printk(KERN_ALERT "tsk->{mm,active_mm}->pgd = %016lx\n",
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(tsk->mm ? (unsigned long) tsk->mm->pgd :
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(unsigned long) tsk->active_mm->pgd));
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die_if_kernel("Oops", regs);
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}
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static void __kprobes bad_kernel_pc(struct pt_regs *regs, unsigned long vaddr)
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{
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printk(KERN_CRIT "OOPS: Bogus kernel PC [%016lx] in fault handler\n",
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regs->tpc);
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printk(KERN_CRIT "OOPS: RPC [%016lx]\n", regs->u_regs[15]);
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printk("OOPS: RPC <%pS>\n", (void *) regs->u_regs[15]);
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printk(KERN_CRIT "OOPS: Fault was to vaddr[%lx]\n", vaddr);
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dump_stack();
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unhandled_fault(regs->tpc, current, regs);
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}
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/*
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* We now make sure that mmap_sem is held in all paths that call
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* this. Additionally, to prevent kswapd from ripping ptes from
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* under us, raise interrupts around the time that we look at the
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* pte, kswapd will have to wait to get his smp ipi response from
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* us. vmtruncate likewise. This saves us having to get pte lock.
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*/
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static unsigned int get_user_insn(unsigned long tpc)
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{
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pgd_t *pgdp = pgd_offset(current->mm, tpc);
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pud_t *pudp;
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pmd_t *pmdp;
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pte_t *ptep, pte;
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unsigned long pa;
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u32 insn = 0;
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unsigned long pstate;
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if (pgd_none(*pgdp))
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goto outret;
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pudp = pud_offset(pgdp, tpc);
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if (pud_none(*pudp))
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goto outret;
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pmdp = pmd_offset(pudp, tpc);
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if (pmd_none(*pmdp))
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goto outret;
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/* This disables preemption for us as well. */
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__asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate));
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__asm__ __volatile__("wrpr %0, %1, %%pstate"
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: : "r" (pstate), "i" (PSTATE_IE));
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ptep = pte_offset_map(pmdp, tpc);
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pte = *ptep;
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if (!pte_present(pte))
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goto out;
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pa = (pte_pfn(pte) << PAGE_SHIFT);
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pa += (tpc & ~PAGE_MASK);
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/* Use phys bypass so we don't pollute dtlb/dcache. */
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__asm__ __volatile__("lduwa [%1] %2, %0"
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: "=r" (insn)
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: "r" (pa), "i" (ASI_PHYS_USE_EC));
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out:
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pte_unmap(ptep);
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__asm__ __volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate));
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outret:
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return insn;
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}
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static inline void
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show_signal_msg(struct pt_regs *regs, int sig, int code,
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unsigned long address, struct task_struct *tsk)
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{
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if (!unhandled_signal(tsk, sig))
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return;
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if (!printk_ratelimit())
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return;
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printk("%s%s[%d]: segfault at %lx ip %p (rpc %p) sp %p error %x",
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task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG,
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tsk->comm, task_pid_nr(tsk), address,
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(void *)regs->tpc, (void *)regs->u_regs[UREG_I7],
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(void *)regs->u_regs[UREG_FP], code);
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print_vma_addr(KERN_CONT " in ", regs->tpc);
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printk(KERN_CONT "\n");
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}
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extern unsigned long compute_effective_address(struct pt_regs *, unsigned int, unsigned int);
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static void do_fault_siginfo(int code, int sig, struct pt_regs *regs,
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unsigned int insn, int fault_code)
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{
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unsigned long addr;
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siginfo_t info;
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info.si_code = code;
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info.si_signo = sig;
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info.si_errno = 0;
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if (fault_code & FAULT_CODE_ITLB)
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addr = regs->tpc;
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else
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addr = compute_effective_address(regs, insn, 0);
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info.si_addr = (void __user *) addr;
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info.si_trapno = 0;
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if (unlikely(show_unhandled_signals))
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show_signal_msg(regs, sig, code, addr, current);
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force_sig_info(sig, &info, current);
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}
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extern int handle_ldf_stq(u32, struct pt_regs *);
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extern int handle_ld_nf(u32, struct pt_regs *);
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static unsigned int get_fault_insn(struct pt_regs *regs, unsigned int insn)
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{
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if (!insn) {
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if (!regs->tpc || (regs->tpc & 0x3))
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return 0;
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if (regs->tstate & TSTATE_PRIV) {
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insn = *(unsigned int *) regs->tpc;
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} else {
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insn = get_user_insn(regs->tpc);
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}
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}
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return insn;
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}
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static void __kprobes do_kernel_fault(struct pt_regs *regs, int si_code,
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int fault_code, unsigned int insn,
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unsigned long address)
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{
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unsigned char asi = ASI_P;
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if ((!insn) && (regs->tstate & TSTATE_PRIV))
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goto cannot_handle;
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/* If user insn could be read (thus insn is zero), that
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* is fine. We will just gun down the process with a signal
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* in that case.
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*/
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if (!(fault_code & (FAULT_CODE_WRITE|FAULT_CODE_ITLB)) &&
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(insn & 0xc0800000) == 0xc0800000) {
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if (insn & 0x2000)
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asi = (regs->tstate >> 24);
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else
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asi = (insn >> 5);
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if ((asi & 0xf2) == 0x82) {
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if (insn & 0x1000000) {
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handle_ldf_stq(insn, regs);
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} else {
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/* This was a non-faulting load. Just clear the
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* destination register(s) and continue with the next
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* instruction. -jj
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*/
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handle_ld_nf(insn, regs);
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}
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return;
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}
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}
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/* Is this in ex_table? */
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if (regs->tstate & TSTATE_PRIV) {
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const struct exception_table_entry *entry;
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entry = search_exception_tables(regs->tpc);
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if (entry) {
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regs->tpc = entry->fixup;
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regs->tnpc = regs->tpc + 4;
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return;
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}
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} else {
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/* The si_code was set to make clear whether
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* this was a SEGV_MAPERR or SEGV_ACCERR fault.
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*/
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do_fault_siginfo(si_code, SIGSEGV, regs, insn, fault_code);
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return;
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}
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cannot_handle:
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unhandled_fault (address, current, regs);
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}
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static void noinline __kprobes bogus_32bit_fault_tpc(struct pt_regs *regs)
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{
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static int times;
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if (times++ < 10)
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printk(KERN_ERR "FAULT[%s:%d]: 32-bit process reports "
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"64-bit TPC [%lx]\n",
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current->comm, current->pid,
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regs->tpc);
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show_regs(regs);
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}
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static void noinline __kprobes bogus_32bit_fault_address(struct pt_regs *regs,
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unsigned long addr)
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{
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static int times;
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if (times++ < 10)
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printk(KERN_ERR "FAULT[%s:%d]: 32-bit process "
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"reports 64-bit fault address [%lx]\n",
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current->comm, current->pid, addr);
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show_regs(regs);
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}
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asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs)
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{
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struct mm_struct *mm = current->mm;
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struct vm_area_struct *vma;
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unsigned int insn = 0;
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int si_code, fault_code, fault;
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unsigned long address, mm_rss;
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fault_code = get_thread_fault_code();
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if (notify_page_fault(regs))
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return;
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si_code = SEGV_MAPERR;
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address = current_thread_info()->fault_address;
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if ((fault_code & FAULT_CODE_ITLB) &&
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(fault_code & FAULT_CODE_DTLB))
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BUG();
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if (test_thread_flag(TIF_32BIT)) {
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if (!(regs->tstate & TSTATE_PRIV)) {
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if (unlikely((regs->tpc >> 32) != 0)) {
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bogus_32bit_fault_tpc(regs);
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goto intr_or_no_mm;
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}
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}
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if (unlikely((address >> 32) != 0)) {
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bogus_32bit_fault_address(regs, address);
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goto intr_or_no_mm;
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}
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}
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if (regs->tstate & TSTATE_PRIV) {
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unsigned long tpc = regs->tpc;
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/* Sanity check the PC. */
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if ((tpc >= KERNBASE && tpc < (unsigned long) __init_end) ||
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(tpc >= MODULES_VADDR && tpc < MODULES_END)) {
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/* Valid, no problems... */
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} else {
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bad_kernel_pc(regs, address);
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return;
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}
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}
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/*
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* If we're in an interrupt or have no user
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* context, we must not take the fault..
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*/
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if (in_atomic() || !mm)
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goto intr_or_no_mm;
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
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if (!down_read_trylock(&mm->mmap_sem)) {
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if ((regs->tstate & TSTATE_PRIV) &&
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!search_exception_tables(regs->tpc)) {
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insn = get_fault_insn(regs, insn);
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goto handle_kernel_fault;
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}
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down_read(&mm->mmap_sem);
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}
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vma = find_vma(mm, address);
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if (!vma)
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goto bad_area;
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/* Pure DTLB misses do not tell us whether the fault causing
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* load/store/atomic was a write or not, it only says that there
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* was no match. So in such a case we (carefully) read the
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* instruction to try and figure this out. It's an optimization
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* so it's ok if we can't do this.
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*
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* Special hack, window spill/fill knows the exact fault type.
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*/
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if (((fault_code &
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(FAULT_CODE_DTLB | FAULT_CODE_WRITE | FAULT_CODE_WINFIXUP)) == FAULT_CODE_DTLB) &&
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(vma->vm_flags & VM_WRITE) != 0) {
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insn = get_fault_insn(regs, 0);
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if (!insn)
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goto continue_fault;
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/* All loads, stores and atomics have bits 30 and 31 both set
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* in the instruction. Bit 21 is set in all stores, but we
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* have to avoid prefetches which also have bit 21 set.
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*/
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if ((insn & 0xc0200000) == 0xc0200000 &&
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(insn & 0x01780000) != 0x01680000) {
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/* Don't bother updating thread struct value,
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* because update_mmu_cache only cares which tlb
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* the access came from.
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*/
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fault_code |= FAULT_CODE_WRITE;
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}
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}
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continue_fault:
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if (vma->vm_start <= address)
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goto good_area;
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if (!(vma->vm_flags & VM_GROWSDOWN))
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goto bad_area;
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if (!(fault_code & FAULT_CODE_WRITE)) {
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/* Non-faulting loads shouldn't expand stack. */
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insn = get_fault_insn(regs, insn);
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if ((insn & 0xc0800000) == 0xc0800000) {
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unsigned char asi;
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if (insn & 0x2000)
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asi = (regs->tstate >> 24);
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else
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asi = (insn >> 5);
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if ((asi & 0xf2) == 0x82)
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goto bad_area;
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}
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}
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if (expand_stack(vma, address))
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goto bad_area;
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/*
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* Ok, we have a good vm_area for this memory access, so
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* we can handle it..
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*/
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good_area:
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si_code = SEGV_ACCERR;
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/* If we took a ITLB miss on a non-executable page, catch
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* that here.
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*/
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if ((fault_code & FAULT_CODE_ITLB) && !(vma->vm_flags & VM_EXEC)) {
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BUG_ON(address != regs->tpc);
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BUG_ON(regs->tstate & TSTATE_PRIV);
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goto bad_area;
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}
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if (fault_code & FAULT_CODE_WRITE) {
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if (!(vma->vm_flags & VM_WRITE))
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goto bad_area;
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/* Spitfire has an icache which does not snoop
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* processor stores. Later processors do...
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*/
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if (tlb_type == spitfire &&
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(vma->vm_flags & VM_EXEC) != 0 &&
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vma->vm_file != NULL)
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set_thread_fault_code(fault_code |
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FAULT_CODE_BLKCOMMIT);
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} else {
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/* Allow reads even for write-only mappings */
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if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
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goto bad_area;
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}
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fault = handle_mm_fault(mm, vma, address, (fault_code & FAULT_CODE_WRITE) ? FAULT_FLAG_WRITE : 0);
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if (unlikely(fault & VM_FAULT_ERROR)) {
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if (fault & VM_FAULT_OOM)
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goto out_of_memory;
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else if (fault & VM_FAULT_SIGBUS)
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goto do_sigbus;
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BUG();
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}
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if (fault & VM_FAULT_MAJOR) {
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current->maj_flt++;
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, address);
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} else {
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current->min_flt++;
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perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, address);
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}
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up_read(&mm->mmap_sem);
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mm_rss = get_mm_rss(mm);
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#ifdef CONFIG_HUGETLB_PAGE
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mm_rss -= (mm->context.huge_pte_count * (HPAGE_SIZE / PAGE_SIZE));
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#endif
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if (unlikely(mm_rss >
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mm->context.tsb_block[MM_TSB_BASE].tsb_rss_limit))
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tsb_grow(mm, MM_TSB_BASE, mm_rss);
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#ifdef CONFIG_HUGETLB_PAGE
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mm_rss = mm->context.huge_pte_count;
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if (unlikely(mm_rss >
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mm->context.tsb_block[MM_TSB_HUGE].tsb_rss_limit))
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tsb_grow(mm, MM_TSB_HUGE, mm_rss);
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#endif
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return;
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/*
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* Something tried to access memory that isn't in our memory map..
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* Fix it, but check if it's kernel or user first..
|
|
*/
|
|
bad_area:
|
|
insn = get_fault_insn(regs, insn);
|
|
up_read(&mm->mmap_sem);
|
|
|
|
handle_kernel_fault:
|
|
do_kernel_fault(regs, si_code, fault_code, insn, address);
|
|
return;
|
|
|
|
/*
|
|
* We ran out of memory, or some other thing happened to us that made
|
|
* us unable to handle the page fault gracefully.
|
|
*/
|
|
out_of_memory:
|
|
insn = get_fault_insn(regs, insn);
|
|
up_read(&mm->mmap_sem);
|
|
if (!(regs->tstate & TSTATE_PRIV)) {
|
|
pagefault_out_of_memory();
|
|
return;
|
|
}
|
|
goto handle_kernel_fault;
|
|
|
|
intr_or_no_mm:
|
|
insn = get_fault_insn(regs, 0);
|
|
goto handle_kernel_fault;
|
|
|
|
do_sigbus:
|
|
insn = get_fault_insn(regs, insn);
|
|
up_read(&mm->mmap_sem);
|
|
|
|
/*
|
|
* Send a sigbus, regardless of whether we were in kernel
|
|
* or user mode.
|
|
*/
|
|
do_fault_siginfo(BUS_ADRERR, SIGBUS, regs, insn, fault_code);
|
|
|
|
/* Kernel mode? Handle exceptions or die */
|
|
if (regs->tstate & TSTATE_PRIV)
|
|
goto handle_kernel_fault;
|
|
}
|