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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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45bb966d3d
We are saving pointer to iommu DT node in of_iommu_set_ops() hence we should increment DT node ref count. Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Anup Patel <anup.patel@broadcom.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
190 lines
4.9 KiB
C
190 lines
4.9 KiB
C
/*
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* OF helpers for IOMMU
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*
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* Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include <linux/export.h>
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#include <linux/iommu.h>
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#include <linux/limits.h>
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#include <linux/of.h>
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#include <linux/of_iommu.h>
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#include <linux/slab.h>
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static const struct of_device_id __iommu_of_table_sentinel
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__used __section(__iommu_of_table_end);
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/**
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* of_get_dma_window - Parse *dma-window property and returns 0 if found.
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*
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* @dn: device node
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* @prefix: prefix for property name if any
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* @index: index to start to parse
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* @busno: Returns busno if supported. Otherwise pass NULL
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* @addr: Returns address that DMA starts
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* @size: Returns the range that DMA can handle
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*
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* This supports different formats flexibly. "prefix" can be
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* configured if any. "busno" and "index" are optionally
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* specified. Set 0(or NULL) if not used.
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*/
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int of_get_dma_window(struct device_node *dn, const char *prefix, int index,
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unsigned long *busno, dma_addr_t *addr, size_t *size)
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{
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const __be32 *dma_window, *end;
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int bytes, cur_index = 0;
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char propname[NAME_MAX], addrname[NAME_MAX], sizename[NAME_MAX];
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if (!dn || !addr || !size)
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return -EINVAL;
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if (!prefix)
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prefix = "";
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snprintf(propname, sizeof(propname), "%sdma-window", prefix);
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snprintf(addrname, sizeof(addrname), "%s#dma-address-cells", prefix);
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snprintf(sizename, sizeof(sizename), "%s#dma-size-cells", prefix);
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dma_window = of_get_property(dn, propname, &bytes);
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if (!dma_window)
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return -ENODEV;
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end = dma_window + bytes / sizeof(*dma_window);
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while (dma_window < end) {
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u32 cells;
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const void *prop;
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/* busno is one cell if supported */
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if (busno)
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*busno = be32_to_cpup(dma_window++);
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prop = of_get_property(dn, addrname, NULL);
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if (!prop)
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prop = of_get_property(dn, "#address-cells", NULL);
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cells = prop ? be32_to_cpup(prop) : of_n_addr_cells(dn);
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if (!cells)
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return -EINVAL;
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*addr = of_read_number(dma_window, cells);
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dma_window += cells;
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prop = of_get_property(dn, sizename, NULL);
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cells = prop ? be32_to_cpup(prop) : of_n_size_cells(dn);
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if (!cells)
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return -EINVAL;
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*size = of_read_number(dma_window, cells);
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dma_window += cells;
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if (cur_index++ == index)
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break;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(of_get_dma_window);
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struct of_iommu_node {
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struct list_head list;
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struct device_node *np;
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struct iommu_ops *ops;
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};
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static LIST_HEAD(of_iommu_list);
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static DEFINE_SPINLOCK(of_iommu_lock);
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void of_iommu_set_ops(struct device_node *np, struct iommu_ops *ops)
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{
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struct of_iommu_node *iommu = kzalloc(sizeof(*iommu), GFP_KERNEL);
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if (WARN_ON(!iommu))
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return;
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of_node_get(np);
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INIT_LIST_HEAD(&iommu->list);
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iommu->np = np;
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iommu->ops = ops;
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spin_lock(&of_iommu_lock);
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list_add_tail(&iommu->list, &of_iommu_list);
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spin_unlock(&of_iommu_lock);
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}
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struct iommu_ops *of_iommu_get_ops(struct device_node *np)
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{
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struct of_iommu_node *node;
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struct iommu_ops *ops = NULL;
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spin_lock(&of_iommu_lock);
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list_for_each_entry(node, &of_iommu_list, list)
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if (node->np == np) {
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ops = node->ops;
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break;
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}
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spin_unlock(&of_iommu_lock);
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return ops;
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}
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struct iommu_ops *of_iommu_configure(struct device *dev,
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struct device_node *master_np)
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{
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struct of_phandle_args iommu_spec;
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struct device_node *np;
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struct iommu_ops *ops = NULL;
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int idx = 0;
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/*
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* We can't do much for PCI devices without knowing how
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* device IDs are wired up from the PCI bus to the IOMMU.
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*/
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if (dev_is_pci(dev))
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return NULL;
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/*
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* We don't currently walk up the tree looking for a parent IOMMU.
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* See the `Notes:' section of
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* Documentation/devicetree/bindings/iommu/iommu.txt
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*/
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while (!of_parse_phandle_with_args(master_np, "iommus",
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"#iommu-cells", idx,
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&iommu_spec)) {
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np = iommu_spec.np;
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ops = of_iommu_get_ops(np);
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if (!ops || !ops->of_xlate || ops->of_xlate(dev, &iommu_spec))
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goto err_put_node;
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of_node_put(np);
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idx++;
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}
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return ops;
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err_put_node:
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of_node_put(np);
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return NULL;
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}
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void __init of_iommu_init(void)
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{
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struct device_node *np;
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const struct of_device_id *match, *matches = &__iommu_of_table;
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for_each_matching_node_and_match(np, matches, &match) {
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const of_iommu_init_fn init_fn = match->data;
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if (init_fn(np))
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pr_err("Failed to initialise IOMMU %s\n",
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of_node_full_name(np));
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}
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}
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