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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation version 2 this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 97 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141901.025053186@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
383 lines
9.7 KiB
C
383 lines
9.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2007-2009 Texas Instruments Inc
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* Copyright (C) 2007 MontaVista Software, Inc.
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*
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* Andy Lowe (alowe@mvista.com), MontaVista Software
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* - Initial version
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* Murali Karicheri (mkaricheri@gmail.com), Texas Instruments Ltd.
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* - ported to sub device interface
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*/
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#ifndef _OSD_H
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#define _OSD_H
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#include <media/davinci/vpbe_types.h>
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#define DM644X_VPBE_OSD_SUBDEV_NAME "dm644x,vpbe-osd"
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#define DM365_VPBE_OSD_SUBDEV_NAME "dm365,vpbe-osd"
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#define DM355_VPBE_OSD_SUBDEV_NAME "dm355,vpbe-osd"
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/**
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* enum osd_layer
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* @WIN_OSD0: On-Screen Display Window 0
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* @WIN_VID0: Video Window 0
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* @WIN_OSD1: On-Screen Display Window 1
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* @WIN_VID1: Video Window 1
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*
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* Description:
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* An enumeration of the osd display layers.
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*/
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enum osd_layer {
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WIN_OSD0,
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WIN_VID0,
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WIN_OSD1,
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WIN_VID1,
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};
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/**
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* enum osd_win_layer
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* @OSDWIN_OSD0: On-Screen Display Window 0
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* @OSDWIN_OSD1: On-Screen Display Window 1
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*
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* Description:
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* An enumeration of the OSD Window layers.
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*/
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enum osd_win_layer {
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OSDWIN_OSD0,
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OSDWIN_OSD1,
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};
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/**
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* enum osd_pix_format
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* @PIXFMT_1BPP: 1-bit-per-pixel bitmap
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* @PIXFMT_2BPP: 2-bits-per-pixel bitmap
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* @PIXFMT_4BPP: 4-bits-per-pixel bitmap
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* @PIXFMT_8BPP: 8-bits-per-pixel bitmap
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* @PIXFMT_RGB565: 16-bits-per-pixel RGB565
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* @PIXFMT_YCbCrI: YUV 4:2:2
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* @PIXFMT_RGB888: 24-bits-per-pixel RGB888
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* @PIXFMT_YCrCbI: YUV 4:2:2 with chroma swap
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* @PIXFMT_NV12: YUV 4:2:0 planar
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* @PIXFMT_OSD_ATTR: OSD Attribute Window pixel format (4bpp)
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*
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* Description:
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* An enumeration of the DaVinci pixel formats.
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*/
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enum osd_pix_format {
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PIXFMT_1BPP = 0,
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PIXFMT_2BPP,
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PIXFMT_4BPP,
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PIXFMT_8BPP,
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PIXFMT_RGB565,
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PIXFMT_YCBCRI,
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PIXFMT_RGB888,
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PIXFMT_YCRCBI,
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PIXFMT_NV12,
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PIXFMT_OSD_ATTR,
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};
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/**
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* enum osd_h_exp_ratio
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* @H_EXP_OFF: no expansion (1/1)
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* @H_EXP_9_OVER_8: 9/8 expansion ratio
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* @H_EXP_3_OVER_2: 3/2 expansion ratio
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*
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* Description:
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* An enumeration of the available horizontal expansion ratios.
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*/
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enum osd_h_exp_ratio {
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H_EXP_OFF,
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H_EXP_9_OVER_8,
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H_EXP_3_OVER_2,
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};
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/**
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* enum osd_v_exp_ratio
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* @V_EXP_OFF: no expansion (1/1)
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* @V_EXP_6_OVER_5: 6/5 expansion ratio
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*
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* Description:
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* An enumeration of the available vertical expansion ratios.
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*/
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enum osd_v_exp_ratio {
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V_EXP_OFF,
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V_EXP_6_OVER_5,
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};
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/**
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* enum osd_zoom_factor
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* @ZOOM_X1: no zoom (x1)
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* @ZOOM_X2: x2 zoom
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* @ZOOM_X4: x4 zoom
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*
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* Description:
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* An enumeration of the available zoom factors.
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*/
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enum osd_zoom_factor {
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ZOOM_X1,
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ZOOM_X2,
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ZOOM_X4,
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};
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/**
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* enum osd_clut
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* @ROM_CLUT: ROM CLUT
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* @RAM_CLUT: RAM CLUT
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*
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* Description:
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* An enumeration of the available Color Lookup Tables (CLUTs).
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*/
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enum osd_clut {
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ROM_CLUT,
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RAM_CLUT,
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};
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/**
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* enum osd_rom_clut
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* @ROM_CLUT0: Macintosh CLUT
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* @ROM_CLUT1: CLUT from DM270 and prior devices
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*
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* Description:
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* An enumeration of the ROM Color Lookup Table (CLUT) options.
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*/
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enum osd_rom_clut {
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ROM_CLUT0,
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ROM_CLUT1,
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};
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/**
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* enum osd_blending_factor
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* @OSD_0_VID_8: OSD pixels are fully transparent
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* @OSD_1_VID_7: OSD pixels contribute 1/8, video pixels contribute 7/8
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* @OSD_2_VID_6: OSD pixels contribute 2/8, video pixels contribute 6/8
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* @OSD_3_VID_5: OSD pixels contribute 3/8, video pixels contribute 5/8
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* @OSD_4_VID_4: OSD pixels contribute 4/8, video pixels contribute 4/8
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* @OSD_5_VID_3: OSD pixels contribute 5/8, video pixels contribute 3/8
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* @OSD_6_VID_2: OSD pixels contribute 6/8, video pixels contribute 2/8
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* @OSD_8_VID_0: OSD pixels are fully opaque
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*
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* Description:
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* An enumeration of the DaVinci pixel blending factor options.
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*/
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enum osd_blending_factor {
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OSD_0_VID_8,
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OSD_1_VID_7,
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OSD_2_VID_6,
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OSD_3_VID_5,
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OSD_4_VID_4,
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OSD_5_VID_3,
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OSD_6_VID_2,
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OSD_8_VID_0,
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};
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/**
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* enum osd_blink_interval
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* @BLINK_X1: blink interval is 1 vertical refresh cycle
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* @BLINK_X2: blink interval is 2 vertical refresh cycles
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* @BLINK_X3: blink interval is 3 vertical refresh cycles
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* @BLINK_X4: blink interval is 4 vertical refresh cycles
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*
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* Description:
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* An enumeration of the DaVinci pixel blinking interval options.
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*/
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enum osd_blink_interval {
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BLINK_X1,
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BLINK_X2,
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BLINK_X3,
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BLINK_X4,
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};
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/**
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* enum osd_cursor_h_width
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* @H_WIDTH_1: horizontal line width is 1 pixel
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* @H_WIDTH_4: horizontal line width is 4 pixels
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* @H_WIDTH_8: horizontal line width is 8 pixels
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* @H_WIDTH_12: horizontal line width is 12 pixels
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* @H_WIDTH_16: horizontal line width is 16 pixels
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* @H_WIDTH_20: horizontal line width is 20 pixels
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* @H_WIDTH_24: horizontal line width is 24 pixels
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* @H_WIDTH_28: horizontal line width is 28 pixels
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*/
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enum osd_cursor_h_width {
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H_WIDTH_1,
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H_WIDTH_4,
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H_WIDTH_8,
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H_WIDTH_12,
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H_WIDTH_16,
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H_WIDTH_20,
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H_WIDTH_24,
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H_WIDTH_28,
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};
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/**
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* enum davinci_cursor_v_width
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* @V_WIDTH_1: vertical line width is 1 line
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* @V_WIDTH_2: vertical line width is 2 lines
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* @V_WIDTH_4: vertical line width is 4 lines
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* @V_WIDTH_6: vertical line width is 6 lines
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* @V_WIDTH_8: vertical line width is 8 lines
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* @V_WIDTH_10: vertical line width is 10 lines
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* @V_WIDTH_12: vertical line width is 12 lines
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* @V_WIDTH_14: vertical line width is 14 lines
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*/
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enum osd_cursor_v_width {
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V_WIDTH_1,
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V_WIDTH_2,
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V_WIDTH_4,
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V_WIDTH_6,
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V_WIDTH_8,
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V_WIDTH_10,
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V_WIDTH_12,
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V_WIDTH_14,
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};
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/**
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* struct osd_cursor_config
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* @xsize: horizontal size in pixels
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* @ysize: vertical size in lines
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* @xpos: horizontal offset in pixels from the left edge of the display
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* @ypos: vertical offset in lines from the top of the display
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* @interlaced: Non-zero if the display is interlaced, or zero otherwise
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* @h_width: horizontal line width
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* @v_width: vertical line width
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* @clut: the CLUT selector (ROM or RAM) for the cursor color
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* @clut_index: an index into the CLUT for the cursor color
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*
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* Description:
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* A structure describing the configuration parameters of the hardware
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* rectangular cursor.
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*/
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struct osd_cursor_config {
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unsigned xsize;
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unsigned ysize;
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unsigned xpos;
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unsigned ypos;
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int interlaced;
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enum osd_cursor_h_width h_width;
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enum osd_cursor_v_width v_width;
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enum osd_clut clut;
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unsigned char clut_index;
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};
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/**
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* struct osd_layer_config
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* @pixfmt: pixel format
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* @line_length: offset in bytes between start of each line in memory
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* @xsize: number of horizontal pixels displayed per line
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* @ysize: number of lines displayed
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* @xpos: horizontal offset in pixels from the left edge of the display
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* @ypos: vertical offset in lines from the top of the display
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* @interlaced: Non-zero if the display is interlaced, or zero otherwise
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*
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* Description:
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* A structure describing the configuration parameters of an On-Screen Display
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* (OSD) or video layer related to how the image is stored in memory.
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* @line_length must be a multiple of the cache line size (32 bytes).
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*/
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struct osd_layer_config {
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enum osd_pix_format pixfmt;
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unsigned line_length;
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unsigned xsize;
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unsigned ysize;
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unsigned xpos;
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unsigned ypos;
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int interlaced;
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};
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/* parameters that apply on a per-window (OSD or video) basis */
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struct osd_window_state {
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int is_allocated;
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int is_enabled;
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unsigned long fb_base_phys;
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enum osd_zoom_factor h_zoom;
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enum osd_zoom_factor v_zoom;
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struct osd_layer_config lconfig;
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};
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/* parameters that apply on a per-OSD-window basis */
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struct osd_osdwin_state {
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enum osd_clut clut;
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enum osd_blending_factor blend;
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int colorkey_blending;
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unsigned colorkey;
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int rec601_attenuation;
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/* index is pixel value */
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unsigned char palette_map[16];
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};
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/* hardware rectangular cursor parameters */
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struct osd_cursor_state {
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int is_enabled;
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struct osd_cursor_config config;
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};
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struct osd_state;
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struct vpbe_osd_ops {
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int (*initialize)(struct osd_state *sd);
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int (*request_layer)(struct osd_state *sd, enum osd_layer layer);
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void (*release_layer)(struct osd_state *sd, enum osd_layer layer);
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int (*enable_layer)(struct osd_state *sd, enum osd_layer layer,
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int otherwin);
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void (*disable_layer)(struct osd_state *sd, enum osd_layer layer);
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int (*set_layer_config)(struct osd_state *sd, enum osd_layer layer,
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struct osd_layer_config *lconfig);
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void (*get_layer_config)(struct osd_state *sd, enum osd_layer layer,
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struct osd_layer_config *lconfig);
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void (*start_layer)(struct osd_state *sd, enum osd_layer layer,
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unsigned long fb_base_phys,
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unsigned long cbcr_ofst);
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void (*set_left_margin)(struct osd_state *sd, u32 val);
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void (*set_top_margin)(struct osd_state *sd, u32 val);
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void (*set_interpolation_filter)(struct osd_state *sd, int filter);
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int (*set_vid_expansion)(struct osd_state *sd,
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enum osd_h_exp_ratio h_exp,
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enum osd_v_exp_ratio v_exp);
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void (*get_vid_expansion)(struct osd_state *sd,
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enum osd_h_exp_ratio *h_exp,
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enum osd_v_exp_ratio *v_exp);
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void (*set_zoom)(struct osd_state *sd, enum osd_layer layer,
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enum osd_zoom_factor h_zoom,
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enum osd_zoom_factor v_zoom);
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};
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struct osd_state {
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enum vpbe_version vpbe_type;
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spinlock_t lock;
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struct device *dev;
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dma_addr_t osd_base_phys;
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void __iomem *osd_base;
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unsigned long osd_size;
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/* 1-->the isr will toggle the VID0 ping-pong buffer */
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int pingpong;
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int interpolation_filter;
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int field_inversion;
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enum osd_h_exp_ratio osd_h_exp;
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enum osd_v_exp_ratio osd_v_exp;
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enum osd_h_exp_ratio vid_h_exp;
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enum osd_v_exp_ratio vid_v_exp;
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enum osd_clut backg_clut;
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unsigned backg_clut_index;
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enum osd_rom_clut rom_clut;
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int is_blinking;
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/* attribute window blinking enabled */
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enum osd_blink_interval blink;
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/* YCbCrI or YCrCbI */
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enum osd_pix_format yc_pixfmt;
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/* columns are Y, Cb, Cr */
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unsigned char clut_ram[256][3];
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struct osd_cursor_state cursor;
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/* OSD0, VID0, OSD1, VID1 */
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struct osd_window_state win[4];
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/* OSD0, OSD1 */
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struct osd_osdwin_state osdwin[2];
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/* OSD device Operations */
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struct vpbe_osd_ops ops;
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};
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struct osd_platform_data {
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int field_inv_wa_enable;
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};
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#endif
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