mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
b24413180f
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
193 lines
5.5 KiB
C
193 lines
5.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* ross.h: Ross module specific definitions and defines.
|
|
*
|
|
* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
|
|
*/
|
|
|
|
#ifndef _SPARC_ROSS_H
|
|
#define _SPARC_ROSS_H
|
|
|
|
#include <asm/asi.h>
|
|
#include <asm/page.h>
|
|
|
|
/* Ross made Hypersparcs have a %psr 'impl' field of '0001'. The 'vers'
|
|
* field has '1111'.
|
|
*/
|
|
|
|
/* The MMU control register fields on the HyperSparc.
|
|
*
|
|
* -----------------------------------------------------------------
|
|
* |implvers| RSV |CWR|SE|WBE| MID |BM| C|CS|MR|CM|RSV|CE|RSV|NF|ME|
|
|
* -----------------------------------------------------------------
|
|
* 31 24 23-22 21 20 19 18-15 14 13 12 11 10 9 8 7-2 1 0
|
|
*
|
|
* Phew, lots of fields there ;-)
|
|
*
|
|
* CWR: Cache Wrapping Enabled, if one cache wrapping is on.
|
|
* SE: Snoop Enable, turns on bus snooping for cache activity if one.
|
|
* WBE: Write Buffer Enable, one turns it on.
|
|
* MID: The ModuleID of the chip for MBus transactions.
|
|
* BM: Boot-Mode. One indicates the MMU is in boot mode.
|
|
* C: Indicates whether accesses are cachable while the MMU is
|
|
* disabled.
|
|
* CS: Cache Size -- 0 = 128k, 1 = 256k
|
|
* MR: Memory Reflection, one indicates that the memory bus connected
|
|
* to the MBus supports memory reflection.
|
|
* CM: Cache Mode -- 0 = write-through, 1 = copy-back
|
|
* CE: Cache Enable -- 0 = no caching, 1 = cache is on
|
|
* NF: No Fault -- 0 = faults trap the CPU from supervisor mode
|
|
* 1 = faults from supervisor mode do not generate traps
|
|
* ME: MMU Enable -- 0 = MMU is off, 1 = MMU is on
|
|
*/
|
|
|
|
#define HYPERSPARC_CWENABLE 0x00200000
|
|
#define HYPERSPARC_SBENABLE 0x00100000
|
|
#define HYPERSPARC_WBENABLE 0x00080000
|
|
#define HYPERSPARC_MIDMASK 0x00078000
|
|
#define HYPERSPARC_BMODE 0x00004000
|
|
#define HYPERSPARC_ACENABLE 0x00002000
|
|
#define HYPERSPARC_CSIZE 0x00001000
|
|
#define HYPERSPARC_MRFLCT 0x00000800
|
|
#define HYPERSPARC_CMODE 0x00000400
|
|
#define HYPERSPARC_CENABLE 0x00000100
|
|
#define HYPERSPARC_NFAULT 0x00000002
|
|
#define HYPERSPARC_MENABLE 0x00000001
|
|
|
|
|
|
/* The ICCR instruction cache register on the HyperSparc.
|
|
*
|
|
* -----------------------------------------------
|
|
* | | FTD | ICE |
|
|
* -----------------------------------------------
|
|
* 31 1 0
|
|
*
|
|
* This register is accessed using the V8 'wrasr' and 'rdasr'
|
|
* opcodes, since not all assemblers understand them and those
|
|
* that do use different semantics I will just hard code the
|
|
* instruction with a '.word' statement.
|
|
*
|
|
* FTD: If set to one flush instructions executed during an
|
|
* instruction cache hit occurs, the corresponding line
|
|
* for said cache-hit is invalidated. If FTD is zero,
|
|
* an unimplemented 'flush' trap will occur when any
|
|
* flush is executed by the processor.
|
|
*
|
|
* ICE: If set to one, the instruction cache is enabled. If
|
|
* zero, the cache will not be used for instruction fetches.
|
|
*
|
|
* All other bits are read as zeros, and writes to them have no
|
|
* effect.
|
|
*
|
|
* Wheee, not many assemblers understand the %iccr register nor
|
|
* the generic asr r/w instructions.
|
|
*
|
|
* 1000 0011 0100 0111 1100 0000 0000 0000 ! rd %iccr, %g1
|
|
*
|
|
* 0x 8 3 4 7 c 0 0 0 ! 0x8347c000
|
|
*
|
|
* 1011 1111 1000 0000 0110 0000 0000 0000 ! wr %g1, 0x0, %iccr
|
|
*
|
|
* 0x b f 8 0 6 0 0 0 ! 0xbf806000
|
|
*
|
|
*/
|
|
|
|
#define HYPERSPARC_ICCR_FTD 0x00000002
|
|
#define HYPERSPARC_ICCR_ICE 0x00000001
|
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
static inline unsigned int get_ross_icr(void)
|
|
{
|
|
unsigned int icreg;
|
|
|
|
__asm__ __volatile__(".word 0x8347c000\n\t" /* rd %iccr, %g1 */
|
|
"mov %%g1, %0\n\t"
|
|
: "=r" (icreg)
|
|
: /* no inputs */
|
|
: "g1", "memory");
|
|
|
|
return icreg;
|
|
}
|
|
|
|
static inline void put_ross_icr(unsigned int icreg)
|
|
{
|
|
__asm__ __volatile__("or %%g0, %0, %%g1\n\t"
|
|
".word 0xbf806000\n\t" /* wr %g1, 0x0, %iccr */
|
|
"nop\n\t"
|
|
"nop\n\t"
|
|
"nop\n\t"
|
|
: /* no outputs */
|
|
: "r" (icreg)
|
|
: "g1", "memory");
|
|
|
|
return;
|
|
}
|
|
|
|
/* HyperSparc specific cache flushing. */
|
|
|
|
/* This is for the on-chip instruction cache. */
|
|
static inline void hyper_flush_whole_icache(void)
|
|
{
|
|
__asm__ __volatile__("sta %%g0, [%%g0] %0\n\t"
|
|
: /* no outputs */
|
|
: "i" (ASI_M_FLUSH_IWHOLE)
|
|
: "memory");
|
|
return;
|
|
}
|
|
|
|
extern int vac_cache_size;
|
|
extern int vac_line_size;
|
|
|
|
static inline void hyper_clear_all_tags(void)
|
|
{
|
|
unsigned long addr;
|
|
|
|
for(addr = 0; addr < vac_cache_size; addr += vac_line_size)
|
|
__asm__ __volatile__("sta %%g0, [%0] %1\n\t"
|
|
: /* no outputs */
|
|
: "r" (addr), "i" (ASI_M_DATAC_TAG)
|
|
: "memory");
|
|
}
|
|
|
|
static inline void hyper_flush_unconditional_combined(void)
|
|
{
|
|
unsigned long addr;
|
|
|
|
for (addr = 0; addr < vac_cache_size; addr += vac_line_size)
|
|
__asm__ __volatile__("sta %%g0, [%0] %1\n\t"
|
|
: /* no outputs */
|
|
: "r" (addr), "i" (ASI_M_FLUSH_CTX)
|
|
: "memory");
|
|
}
|
|
|
|
static inline void hyper_flush_cache_user(void)
|
|
{
|
|
unsigned long addr;
|
|
|
|
for (addr = 0; addr < vac_cache_size; addr += vac_line_size)
|
|
__asm__ __volatile__("sta %%g0, [%0] %1\n\t"
|
|
: /* no outputs */
|
|
: "r" (addr), "i" (ASI_M_FLUSH_USER)
|
|
: "memory");
|
|
}
|
|
|
|
static inline void hyper_flush_cache_page(unsigned long page)
|
|
{
|
|
unsigned long end;
|
|
|
|
page &= PAGE_MASK;
|
|
end = page + PAGE_SIZE;
|
|
while (page < end) {
|
|
__asm__ __volatile__("sta %%g0, [%0] %1\n\t"
|
|
: /* no outputs */
|
|
: "r" (page), "i" (ASI_M_FLUSH_PAGE)
|
|
: "memory");
|
|
page += vac_line_size;
|
|
}
|
|
}
|
|
|
|
#endif /* !(__ASSEMBLY__) */
|
|
|
|
#endif /* !(_SPARC_ROSS_H) */
|