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a55f9b61d8
Several platforms will most likely use similar pinctrl configurations for SATA0 and SATA1, so we declare those common configurations in the Orion5x DT file. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1398202002-28530-28-git-send-email-thomas.petazzoni@free-electrons.com Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
46 lines
1.0 KiB
Plaintext
46 lines
1.0 KiB
Plaintext
/*
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* Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include "orion5x.dtsi"
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/ {
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compatible = "marvell,orion5x-88f5182", "marvell,orion5x";
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soc {
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compatible = "marvell,orion5x-88f5182-mbus", "simple-bus";
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internal-regs {
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pinctrl: pinctrl@10000 {
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compatible = "marvell,88f5182-pinctrl";
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reg = <0x10000 0x8>, <0x10050 0x4>;
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pmx_sata0: pmx-sata0 {
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marvell,pins = "mpp12", "mpp14";
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marvell,function = "sata0";
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};
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pmx_sata1: pmx-sata1 {
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marvell,pins = "mpp13", "mpp15";
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marvell,function = "sata1";
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};
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};
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core_clk: core-clocks@10030 {
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compatible = "marvell,mv88f5182-core-clock";
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reg = <0x10010 0x4>;
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#clock-cells = <1>;
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};
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mbusc: mbus-controller@20000 {
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compatible = "marvell,mbus-controller";
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reg = <0x20000 0x100>, <0x1500 0x20>;
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};
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};
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};
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};
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