Stefan Agner 8e4934c6d6 tty: serial: fsl_lpuart: clear receive flag on FIFO flush ... When the receiver was enabled during startup, a character could have been in the FIFO when the UART get initially used. The driver configures the (receive) watermark level, and flushes the FIFO. However, the receive flag (RDRF) could still be set at that stage (as mentioned in the register description of UARTx_RWFIFO). This leads to an interrupt which won't be handled properly in interrupt mode: The receive interrupt function lpuart_rxint checks the FIFO count, which is 0 at that point (due to the flush during initialization). The problem does not manifest when using DMA to receive characters. Fix this situation by explicitly read the status register, which leads to clearing of the RDRF flag. Due to the flush just after the status flag read, a explicit data read is not to required. Signed-off-by: Stefan Agner <stefan@agner.ch> Cc: stable <stable@vger.kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2015-03-26 23:13:14 +01:00
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hvc
ipwireless
serial	tty: serial: fsl_lpuart: clear receive flag on FIFO flush	2015-03-26 23:13:14 +01:00
vt
amiserial.c
bfin_jtag_comm.c	TTY: bfin_jtag_comm: remove incorrect wait_until_sent operation	2015-03-07 03:44:14 +01:00
cyclades.c
ehv_bytechan.c
goldfish.c
isicom.c
Kconfig
Makefile
metag_da.c
moxa.c
moxa.h
mxser.c
mxser.h
n_gsm.c
n_hdlc.c
n_r3964.c
n_tracerouter.c
n_tracesink.c
n_tracesink.h
n_tty.c
nozomi.c
pty.c
rocket_int.h
rocket.c
rocket.h
synclink_gt.c
synclink.c
synclinkmp.c
sysrq.c
tty_audit.c
tty_buffer.c
tty_io.c	tty: fix up atime/mtime mess, take four	2015-03-07 03:06:51 +01:00
tty_ioctl.c	TTY: fix tty_wait_until_sent maximum timeout	2015-03-07 03:44:15 +01:00
tty_ldisc.c
tty_ldsem.c
tty_mutex.c
tty_port.c