Jeff McGee 6d5646006f drm/i915/guc: Clear terminated attribute bit on GuC preemption context ... If GuC firmware performs an engine reset while that engine had a preemption pending, it will set the terminated attribute bit on our preemption stage descriptor. GuC firmware retains all pending work items for a high-priority GuC client, unlike the normal-priority GuC client where work items are dropped. It wants to make sure the preempt- to-idle work doesn't run when scheduling resumes, and uses this bit to inform its scheduler and presumably us as well. Our job is to clear it for the next preemption after reset, otherwise that and future preemptions will never complete. We'll just clear it every time. Signed-off-by: Jeff McGee <jeff.mcgee@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171101221630.25086-1-jeff.mcgee@intel.com Reviewed-by: Michel Thierry <michel.thierry@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>		2017-11-02 08:07:22 +00:00
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drm	drm/i915/guc: Clear terminated attribute bit on GuC preemption context	2017-11-02 08:07:22 +00:00
host1x	drm/tegra: Changes for v4.14-rc1	2017-08-21 17:37:33 +10:00
ipu-v3	main drm pull request for 4.14 merge window	2017-09-03 17:02:26 -07:00
vga	sched/wait: Rename wait_queue_t => wait_queue_entry_t	2017-06-20 12:18:27 +02:00
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