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In soft (no-reboot) mode, the driver self-pings watchdog upon expiration of an interrupt. The interrupt has to be cleared, because otherwise system enters infinite interrupt handling loop. Use a samsung,s3c6410-wdt compatible to select appropriate quirk for clearing the watchdog interrupt. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
202 lines
5.0 KiB
Plaintext
202 lines
5.0 KiB
Plaintext
/*
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* Samsung's S3C64xx SoC series common device tree source
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*
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* Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
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*
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* Samsung's S3C64xx SoC series device nodes are listed in this file.
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* Particular SoCs from S3C64xx series can include this file and provide
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* values for SoCs specfic bindings.
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*
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* Note: This file does not include device nodes for all the controllers in
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* S3C64xx SoCs. As device tree coverage for S3C64xx increases, additional
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* nodes can be added to this file.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "skeleton.dtsi"
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#include <dt-bindings/clock/samsung,s3c64xx-clock.h>
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/ {
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aliases {
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i2c0 = &i2c0;
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pinctrl0 = &pinctrl0;
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,arm1176jzf-s", "arm,arm1176";
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reg = <0x0>;
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};
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};
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soc: soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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vic0: interrupt-controller@71200000 {
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compatible = "arm,pl192-vic";
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interrupt-controller;
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reg = <0x71200000 0x1000>;
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#interrupt-cells = <1>;
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};
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vic1: interrupt-controller@71300000 {
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compatible = "arm,pl192-vic";
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interrupt-controller;
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reg = <0x71300000 0x1000>;
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#interrupt-cells = <1>;
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};
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sdhci0: sdhci@7c200000 {
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compatible = "samsung,s3c6410-sdhci";
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reg = <0x7c200000 0x100>;
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interrupt-parent = <&vic1>;
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interrupts = <24>;
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clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
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clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>,
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<&clocks SCLK_MMC0>;
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status = "disabled";
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};
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sdhci1: sdhci@7c300000 {
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compatible = "samsung,s3c6410-sdhci";
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reg = <0x7c300000 0x100>;
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interrupt-parent = <&vic1>;
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interrupts = <25>;
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clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
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clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>,
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<&clocks SCLK_MMC1>;
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status = "disabled";
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};
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sdhci2: sdhci@7c400000 {
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compatible = "samsung,s3c6410-sdhci";
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reg = <0x7c400000 0x100>;
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interrupt-parent = <&vic1>;
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interrupts = <17>;
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clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
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clocks = <&clocks HCLK_HSMMC2>, <&clocks HCLK_HSMMC2>,
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<&clocks SCLK_MMC2>;
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status = "disabled";
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};
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watchdog: watchdog@7e004000 {
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compatible = "samsung,s3c6410-wdt";
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reg = <0x7e004000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <26>;
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clock-names = "watchdog";
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clocks = <&clocks PCLK_WDT>;
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};
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i2c0: i2c@7f004000 {
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compatible = "samsung,s3c2440-i2c";
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reg = <0x7f004000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <18>;
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clock-names = "i2c";
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clocks = <&clocks PCLK_IIC0>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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uart0: serial@7f005000 {
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compatible = "samsung,s3c6400-uart";
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reg = <0x7f005000 0x100>;
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interrupt-parent = <&vic1>;
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interrupts = <5>;
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clock-names = "uart", "clk_uart_baud2",
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"clk_uart_baud3";
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clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
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<&clocks SCLK_UART>;
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status = "disabled";
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};
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uart1: serial@7f005400 {
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compatible = "samsung,s3c6400-uart";
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reg = <0x7f005400 0x100>;
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interrupt-parent = <&vic1>;
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interrupts = <6>;
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clock-names = "uart", "clk_uart_baud2",
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"clk_uart_baud3";
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clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
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<&clocks SCLK_UART>;
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status = "disabled";
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};
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uart2: serial@7f005800 {
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compatible = "samsung,s3c6400-uart";
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reg = <0x7f005800 0x100>;
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interrupt-parent = <&vic1>;
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interrupts = <7>;
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clock-names = "uart", "clk_uart_baud2",
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"clk_uart_baud3";
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clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
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<&clocks SCLK_UART>;
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status = "disabled";
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};
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uart3: serial@7f005c00 {
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compatible = "samsung,s3c6400-uart";
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reg = <0x7f005c00 0x100>;
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interrupt-parent = <&vic1>;
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interrupts = <8>;
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clock-names = "uart", "clk_uart_baud2",
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"clk_uart_baud3";
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clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>,
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<&clocks SCLK_UART>;
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status = "disabled";
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};
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pwm: pwm@7f006000 {
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compatible = "samsung,s3c6400-pwm";
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reg = <0x7f006000 0x1000>;
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interrupt-parent = <&vic0>;
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interrupts = <23>, <24>, <25>, <27>, <28>;
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clock-names = "timers";
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clocks = <&clocks PCLK_PWM>;
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samsung,pwm-outputs = <0>, <1>;
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#pwm-cells = <3>;
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};
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pinctrl0: pinctrl@7f008000 {
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compatible = "samsung,s3c64xx-pinctrl";
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reg = <0x7f008000 0x1000>;
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interrupt-parent = <&vic1>;
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interrupts = <21>;
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pctrl_int_map: pinctrl-interrupt-map {
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interrupt-map = <0 &vic0 0>,
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<1 &vic0 1>,
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<2 &vic1 0>,
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<3 &vic1 1>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <1>;
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};
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wakeup-interrupt-controller {
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compatible = "samsung,s3c64xx-wakeup-eint";
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interrupts = <0>, <1>, <2>, <3>;
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interrupt-parent = <&pctrl_int_map>;
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};
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};
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};
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};
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#include "s3c64xx-pinctrl.dtsi"
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