linux_dsm_epyc7002/arch/xtensa/mm
Max Filippov 6d0f581d17 xtensa: fix cache aliasing handling code for WT cache
Currently building kernel for xtensa core with aliasing WT cache fails
with the following messages:

  mm/memory.c:2152: undefined reference to `flush_dcache_page'
  mm/memory.c:2332: undefined reference to `local_flush_cache_page'
  mm/memory.c:1919: undefined reference to `local_flush_cache_range'
  mm/memory.c:4179: undefined reference to `copy_to_user_page'
  mm/memory.c:4183: undefined reference to `copy_from_user_page'

This happens because implementation of these functions is only compiled
when data cache is WB, which looks wrong: even when data cache doesn't
need flushing it still needs invalidation. The functions like
__flush_[invalidate_]dcache_* are correctly defined for both WB and WT
caches (and even if they weren't that'd still be ok, just slower).

Fix this by providing the same implementation of the above functions for
both WB and WT cache.

Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-07-28 18:35:13 -07:00
..
cache.c xtensa: fix cache aliasing handling code for WT cache 2017-07-28 18:35:13 -07:00
fault.c xtensa: migrate exception table users off module.h and onto extable.h 2017-01-24 12:41:46 -05:00
highmem.c sched/preempt, mm/kmap: Explicitly disable/enable preemption in kmap_atomic_* 2015-05-19 08:39:14 +02:00
init.c xtensa: enable HAVE_DMA_CONTIGUOUS 2016-12-15 10:41:50 -08:00
ioremap.c xtensa: support ioremap for memory outside KIO region 2016-01-11 17:37:36 +03:00
Makefile xtensa: support ioremap for memory outside KIO region 2016-01-11 17:37:36 +03:00
misc.S xtensa: implement clear_user_highpage and copy_user_highpage 2014-08-14 11:59:20 +04:00
mmu.c xtensa: allow fixmap and kmap span more than one page table 2014-08-14 11:59:18 +04:00
tlb.c mm: differentiate page_mapped() from page_mapcount() for compound pages 2016-01-15 17:56:32 -08:00