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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1334 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
213 lines
4.9 KiB
Plaintext
213 lines
4.9 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Device Tree for Klondike (APM8018X) board.
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*
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* Copyright (c) 2010, Applied Micro Circuits Corporation
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* Author: Tanmay Inamdar <tinamdar@apm.com>
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*/
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/dts-v1/;
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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model = "apm,klondike";
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compatible = "apm,klondike";
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dcr-parent = <&{/cpus/cpu@0}>;
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aliases {
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ethernet0 = &EMAC0;
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ethernet1 = &EMAC1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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model = "PowerPC,apm8018x";
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reg = <0x00000000>;
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clock-frequency = <300000000>; /* Filled in by U-Boot */
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timebase-frequency = <300000000>; /* Filled in by U-Boot */
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i-cache-line-size = <32>;
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d-cache-line-size = <32>;
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i-cache-size = <16384>; /* 16 kB */
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d-cache-size = <16384>; /* 16 kB */
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dcr-controller;
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dcr-access-method = "native";
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};
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x20000000>; /* Filled in by U-Boot */
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};
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UIC0: interrupt-controller {
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compatible = "ibm,uic";
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interrupt-controller;
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cell-index = <0>;
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dcr-reg = <0x0c0 0x010>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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};
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UIC1: interrupt-controller1 {
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compatible = "ibm,uic";
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interrupt-controller;
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cell-index = <1>;
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dcr-reg = <0x0d0 0x010>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
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interrupt-parent = <&UIC0>;
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};
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UIC2: interrupt-controller2 {
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compatible = "ibm,uic";
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interrupt-controller;
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cell-index = <2>;
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dcr-reg = <0x0e0 0x010>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <0x0a 0x4 0x0b 0x4>; /* cascade */
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interrupt-parent = <&UIC0>;
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};
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UIC3: interrupt-controller3 {
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compatible = "ibm,uic";
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interrupt-controller;
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cell-index = <3>;
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dcr-reg = <0x0f0 0x010>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
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interrupt-parent = <&UIC0>;
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};
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plb {
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compatible = "ibm,plb4";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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clock-frequency = <0>; /* Filled in by U-Boot */
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SDRAM0: memory-controller {
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compatible = "ibm,sdram-apm8018x";
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dcr-reg = <0x010 0x002>;
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};
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MAL0: mcmal {
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compatible = "ibm,mcmal2";
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dcr-reg = <0x180 0x062>;
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num-tx-chans = <2>;
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num-rx-chans = <16>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-parent = <&UIC1>;
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interrupts = </*TXEOB*/ 0x6 0x4
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/*RXEOB*/ 0x7 0x4
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/*SERR*/ 0x1 0x4
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/*TXDE*/ 0x2 0x4
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/*RXDE*/ 0x3 0x4>;
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};
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POB0: opb {
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compatible = "ibm,opb";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x20000000 0x20000000 0x30000000
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0x50000000 0x50000000 0x10000000
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0x60000000 0x60000000 0x10000000
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0xFE000000 0xFE000000 0x00010000>;
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dcr-reg = <0x100 0x020>;
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clock-frequency = <300000000>; /* Filled in by U-Boot */
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RGMII0: emac-rgmii@400a2000 {
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compatible = "ibm,rgmii";
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reg = <0x400a2000 0x00000010>;
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has-mdio;
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};
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TAH0: emac-tah@400a3000 {
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compatible = "ibm,tah";
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reg = <0x400a3000 0x100>;
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};
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TAH1: emac-tah@400a4000 {
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compatible = "ibm,tah";
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reg = <0x400a4000 0x100>;
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};
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EMAC0: ethernet@400a0000 {
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compatible = "ibm,emac4", "ibm-emac4sync";
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interrupt-parent = <&EMAC0>;
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interrupts = <0x0>;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4>;
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reg = <0x400a0000 0x00000100>;
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local-mac-address = [000000000000]; /* Filled in by U-Boot */
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mal-device = <&MAL0>;
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mal-tx-channel = <0x0>;
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mal-rx-channel = <0x0>;
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cell-index = <0>;
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max-frame-size = <9000>;
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rx-fifo-size = <4096>;
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tx-fifo-size = <2048>;
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phy-mode = "rgmii";
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phy-address = <0x2>;
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turbo = "no";
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phy-map = <0x00000000>;
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rgmii-device = <&RGMII0>;
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rgmii-channel = <0>;
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tah-device = <&TAH0>;
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tah-channel = <0>;
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has-inverted-stacr-oc;
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has-new-stacr-staopc;
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};
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EMAC1: ethernet@400a1000 {
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compatible = "ibm,emac4", "ibm-emac4sync";
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status = "disabled";
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interrupt-parent = <&EMAC1>;
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interrupts = <0x0>;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = </*Status*/ 0x0 &UIC0 0x14 0x4>;
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reg = <0x400a1000 0x00000100>;
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local-mac-address = [000000000000]; /* Filled in by U-Boot */
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mal-device = <&MAL0>;
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mal-tx-channel = <1>;
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mal-rx-channel = <8>;
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cell-index = <1>;
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max-frame-size = <9000>;
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rx-fifo-size = <4096>;
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tx-fifo-size = <2048>;
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phy-mode = "rgmii";
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phy-address = <0x3>;
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turbo = "no";
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phy-map = <0x00000000>;
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rgmii-device = <&RGMII0>;
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rgmii-channel = <1>;
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tah-device = <&TAH1>;
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tah-channel = <0>;
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has-inverted-stacr-oc;
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has-new-stacr-staopc;
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mdio-device = <&EMAC0>;
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};
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};
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};
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chosen {
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stdout-path = "/plb/opb/serial@50001000";
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};
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};
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