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c3d6324f84
In preparation for static_call and variable size jump_label support, teach text_poke_bp() to emulate instructions, namely: JMP32, JMP8, CALL, NOP2, NOP_ATOMIC5, INT3 The current text_poke_bp() takes a @handler argument which is used as a jump target when the temporary INT3 is hit by a different CPU. When patching CALL instructions, this doesn't work because we'd miss the PUSH of the return address. Instead, teach poke_int3_handler() to emulate an instruction, typically the instruction we're patching in. This fits almost all text_poke_bp() users, except arch_unoptimize_kprobe() which restores random text, and for that site we have to build an explicit emulate instruction. Tested-by: Alexei Starovoitov <ast@kernel.org> Tested-by: Steven Rostedt (VMware) <rostedt@goodmis.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Masami Hiramatsu <mhiramat@kernel.org> Reviewed-by: Daniel Bristot de Oliveira <bristot@redhat.com> Acked-by: Alexei Starovoitov <ast@kernel.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/20191111132457.529086974@infradead.org Signed-off-by: Ingo Molnar <mingo@kernel.org> (cherry picked from commit 8c7eebc10687af45ac8e40ad1bac0cf7893dba9f) Signed-off-by: Alexei Starovoitov <ast@kernel.org>
101 lines
3.1 KiB
C
101 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_TEXT_PATCHING_H
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#define _ASM_X86_TEXT_PATCHING_H
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#include <linux/types.h>
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#include <linux/stddef.h>
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#include <asm/ptrace.h>
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struct paravirt_patch_site;
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#ifdef CONFIG_PARAVIRT
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void apply_paravirt(struct paravirt_patch_site *start,
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struct paravirt_patch_site *end);
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#else
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static inline void apply_paravirt(struct paravirt_patch_site *start,
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struct paravirt_patch_site *end)
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{}
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#define __parainstructions NULL
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#define __parainstructions_end NULL
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#endif
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/*
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* Currently, the max observed size in the kernel code is
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* JUMP_LABEL_NOP_SIZE/RELATIVEJUMP_SIZE, which are 5.
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* Raise it if needed.
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*/
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#define POKE_MAX_OPCODE_SIZE 5
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struct text_poke_loc {
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void *addr;
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int len;
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s32 rel32;
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u8 opcode;
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const u8 text[POKE_MAX_OPCODE_SIZE];
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};
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extern void text_poke_early(void *addr, const void *opcode, size_t len);
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/*
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* Clear and restore the kernel write-protection flag on the local CPU.
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* Allows the kernel to edit read-only pages.
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* Side-effect: any interrupt handler running between save and restore will have
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* the ability to write to read-only pages.
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*
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* Warning:
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* Code patching in the UP case is safe if NMIs and MCE handlers are stopped and
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* no thread can be preempted in the instructions being modified (no iret to an
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* invalid instruction possible) or if the instructions are changed from a
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* consistent state to another consistent state atomically.
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* On the local CPU you need to be protected against NMI or MCE handlers seeing
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* an inconsistent instruction while you patch.
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*/
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extern void *text_poke(void *addr, const void *opcode, size_t len);
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extern void *text_poke_kgdb(void *addr, const void *opcode, size_t len);
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extern int poke_int3_handler(struct pt_regs *regs);
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extern void text_poke_bp(void *addr, const void *opcode, size_t len, const void *emulate);
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extern void text_poke_bp_batch(struct text_poke_loc *tp, unsigned int nr_entries);
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extern void text_poke_loc_init(struct text_poke_loc *tp, void *addr,
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const void *opcode, size_t len, const void *emulate);
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extern int after_bootmem;
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extern __ro_after_init struct mm_struct *poking_mm;
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extern __ro_after_init unsigned long poking_addr;
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#ifndef CONFIG_UML_X86
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static inline void int3_emulate_jmp(struct pt_regs *regs, unsigned long ip)
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{
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regs->ip = ip;
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}
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#define INT3_INSN_SIZE 1
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#define INT3_INSN_OPCODE 0xCC
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#define CALL_INSN_SIZE 5
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#define CALL_INSN_OPCODE 0xE8
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#define JMP32_INSN_SIZE 5
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#define JMP32_INSN_OPCODE 0xE9
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#define JMP8_INSN_SIZE 2
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#define JMP8_INSN_OPCODE 0xEB
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static inline void int3_emulate_push(struct pt_regs *regs, unsigned long val)
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{
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/*
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* The int3 handler in entry_64.S adds a gap between the
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* stack where the break point happened, and the saving of
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* pt_regs. We can extend the original stack because of
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* this gap. See the idtentry macro's create_gap option.
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*/
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regs->sp -= sizeof(unsigned long);
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*(unsigned long *)regs->sp = val;
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}
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static inline void int3_emulate_call(struct pt_regs *regs, unsigned long func)
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{
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int3_emulate_push(regs, regs->ip - INT3_INSN_SIZE + CALL_INSN_SIZE);
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int3_emulate_jmp(regs, func);
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}
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#endif /* !CONFIG_UML_X86 */
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#endif /* _ASM_X86_TEXT_PATCHING_H */
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