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The Qualcomm QCS404 platform has several buses that could be controlled and tuned according to the bandwidth demand. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
46 lines
1.2 KiB
Plaintext
46 lines
1.2 KiB
Plaintext
Qualcomm QCS404 Network-On-Chip interconnect driver binding
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-----------------------------------------------------------
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Required properties :
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- compatible : shall contain only one of the following:
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"qcom,qcs404-bimc"
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"qcom,qcs404-pcnoc"
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"qcom,qcs404-snoc"
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- #interconnect-cells : should contain 1
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reg : specifies the physical base address and size of registers
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clocks : list of phandles and specifiers to all interconnect bus clocks
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clock-names : clock names should include both "bus" and "bus_a"
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Example:
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soc {
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...
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bimc: interconnect@400000 {
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reg = <0x00400000 0x80000>;
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compatible = "qcom,qcs404-bimc";
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#interconnect-cells = <1>;
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clock-names = "bus", "bus_a";
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clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
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<&rpmcc RPM_SMD_BIMC_A_CLK>;
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};
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pnoc: interconnect@500000 {
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reg = <0x00500000 0x15080>;
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compatible = "qcom,qcs404-pcnoc";
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#interconnect-cells = <1>;
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clock-names = "bus", "bus_a";
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clocks = <&rpmcc RPM_SMD_PNOC_CLK>,
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<&rpmcc RPM_SMD_PNOC_A_CLK>;
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};
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snoc: interconnect@580000 {
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reg = <0x00580000 0x23080>;
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compatible = "qcom,qcs404-snoc";
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#interconnect-cells = <1>;
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clock-names = "bus", "bus_a";
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clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
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<&rpmcc RPM_SMD_SNOC_A_CLK>;
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};
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};
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