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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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099f3a8548
AM437x SoC has a DES3DES module similar to the one on OMAP4. Add DT node for the same. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
430 lines
10 KiB
Plaintext
430 lines
10 KiB
Plaintext
/*
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* Device Tree Source for AM4372 SoC
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*
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "ti,am4372", "ti,am43";
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interrupt-parent = <&gic>;
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aliases {
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serial0 = &uart0;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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reg = <0>;
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};
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};
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gic: interrupt-controller@48241000 {
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compatible = "arm,cortex-a9-gic";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0x48241000 0x1000>,
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<0x48240100 0x0100>;
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};
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ocp {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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uart0: serial@44e09000 {
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compatible = "ti,am4372-uart","ti,omap2-uart";
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reg = <0x44e09000 0x2000>;
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interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "uart1";
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};
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uart1: serial@48022000 {
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compatible = "ti,am4372-uart","ti,omap2-uart";
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reg = <0x48022000 0x2000>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "uart2";
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status = "disabled";
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};
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uart2: serial@48024000 {
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compatible = "ti,am4372-uart","ti,omap2-uart";
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reg = <0x48024000 0x2000>;
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interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "uart3";
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status = "disabled";
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};
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uart3: serial@481a6000 {
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compatible = "ti,am4372-uart","ti,omap2-uart";
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reg = <0x481a6000 0x2000>;
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interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "uart4";
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status = "disabled";
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};
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uart4: serial@481a8000 {
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compatible = "ti,am4372-uart","ti,omap2-uart";
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reg = <0x481a8000 0x2000>;
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interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "uart5";
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status = "disabled";
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};
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uart5: serial@481aa000 {
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compatible = "ti,am4372-uart","ti,omap2-uart";
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reg = <0x481aa000 0x2000>;
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interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "uart6";
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status = "disabled";
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};
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timer1: timer@44e31000 {
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compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
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reg = <0x44e31000 0x400>;
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interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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ti,timer-alwon;
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ti,hwmods = "timer1";
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};
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timer2: timer@48040000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x48040000 0x400>;
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interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "timer2";
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};
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timer3: timer@48042000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x48042000 0x400>;
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interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "timer3";
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status = "disabled";
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};
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timer4: timer@48044000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x48044000 0x400>;
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interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
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ti,timer-pwm;
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ti,hwmods = "timer4";
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status = "disabled";
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};
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timer5: timer@48046000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x48046000 0x400>;
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interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
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ti,timer-pwm;
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ti,hwmods = "timer5";
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status = "disabled";
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};
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timer6: timer@48048000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x48048000 0x400>;
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interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
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ti,timer-pwm;
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ti,hwmods = "timer6";
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status = "disabled";
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};
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timer7: timer@4804a000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x4804a000 0x400>;
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interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
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ti,timer-pwm;
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ti,hwmods = "timer7";
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status = "disabled";
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};
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timer8: timer@481c1000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x481c1000 0x400>;
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "timer8";
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status = "disabled";
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};
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timer9: timer@4833d000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x4833d000 0x400>;
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interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "timer9";
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status = "disabled";
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};
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timer10: timer@4833f000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x4833f000 0x400>;
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interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "timer10";
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status = "disabled";
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};
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timer11: timer@48341000 {
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compatible = "ti,am4372-timer","ti,am335x-timer";
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reg = <0x48341000 0x400>;
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interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "timer11";
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status = "disabled";
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};
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counter32k: counter@44e86000 {
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compatible = "ti,am4372-counter32k","ti,omap-counter32k";
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reg = <0x44e86000 0x40>;
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ti,hwmods = "counter_32k";
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};
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rtc@44e3e000 {
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compatible = "ti,am4372-rtc","ti,da830-rtc";
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reg = <0x44e3e000 0x1000>;
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interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "rtc";
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status = "disabled";
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};
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wdt@44e35000 {
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compatible = "ti,am4372-wdt","ti,omap3-wdt";
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reg = <0x44e35000 0x1000>;
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interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "wd_timer2";
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status = "disabled";
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};
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gpio0: gpio@44e07000 {
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compatible = "ti,am4372-gpio","ti,omap4-gpio";
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reg = <0x44e07000 0x1000>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,hwmods = "gpio1";
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status = "disabled";
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};
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gpio1: gpio@4804c000 {
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compatible = "ti,am4372-gpio","ti,omap4-gpio";
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reg = <0x4804c000 0x1000>;
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interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,hwmods = "gpio2";
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status = "disabled";
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};
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gpio2: gpio@481ac000 {
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compatible = "ti,am4372-gpio","ti,omap4-gpio";
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reg = <0x481ac000 0x1000>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,hwmods = "gpio3";
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status = "disabled";
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};
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gpio3: gpio@481ae000 {
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compatible = "ti,am4372-gpio","ti,omap4-gpio";
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reg = <0x481ae000 0x1000>;
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interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,hwmods = "gpio4";
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status = "disabled";
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};
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gpio4: gpio@48320000 {
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compatible = "ti,am4372-gpio","ti,omap4-gpio";
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reg = <0x48320000 0x1000>;
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interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,hwmods = "gpio5";
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status = "disabled";
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};
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gpio5: gpio@48322000 {
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compatible = "ti,am4372-gpio","ti,omap4-gpio";
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reg = <0x48322000 0x1000>;
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interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,hwmods = "gpio6";
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status = "disabled";
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};
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i2c0: i2c@44e0b000 {
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compatible = "ti,am4372-i2c","ti,omap4-i2c";
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reg = <0x44e0b000 0x1000>;
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interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "i2c1";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c1: i2c@4802a000 {
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compatible = "ti,am4372-i2c","ti,omap4-i2c";
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reg = <0x4802a000 0x1000>;
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interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "i2c2";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c2: i2c@4819c000 {
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compatible = "ti,am4372-i2c","ti,omap4-i2c";
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reg = <0x4819c000 0x1000>;
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interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "i2c3";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi0: spi@48030000 {
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compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
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reg = <0x48030000 0x400>;
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interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "spi0";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi1: spi@481a0000 {
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compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
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reg = <0x481a0000 0x400>;
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interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "spi1";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi2: spi@481a2000 {
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compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
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reg = <0x481a2000 0x400>;
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interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "spi2";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi3: spi@481a4000 {
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compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
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reg = <0x481a4000 0x400>;
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interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "spi3";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi4: spi@48345000 {
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compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
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reg = <0x48345000 0x400>;
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interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "spi4";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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mac: ethernet@4a100000 {
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compatible = "ti,am4372-cpsw","ti,cpsw";
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reg = <0x4a100000 0x800
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0x4a101200 0x100>;
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interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "cpgmac0";
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status = "disabled";
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};
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epwmss0: epwmss@48300000 {
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compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
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reg = <0x48300000 0x10>;
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ti,hwmods = "epwmss0";
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status = "disabled";
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};
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epwmss1: epwmss@48302000 {
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compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
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reg = <0x48302000 0x10>;
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ti,hwmods = "epwmss1";
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status = "disabled";
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};
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epwmss2: epwmss@48304000 {
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compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
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reg = <0x48304000 0x10>;
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ti,hwmods = "epwmss2";
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status = "disabled";
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};
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epwmss3: epwmss@48306000 {
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compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
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reg = <0x48306000 0x10>;
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ti,hwmods = "epwmss3";
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status = "disabled";
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};
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epwmss4: epwmss@48308000 {
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compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
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reg = <0x48308000 0x10>;
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ti,hwmods = "epwmss4";
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status = "disabled";
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};
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epwmss5: epwmss@4830a000 {
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compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
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reg = <0x4830a000 0x10>;
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ti,hwmods = "epwmss5";
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status = "disabled";
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};
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aes: aes@53501000 {
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compatible = "ti,omap4-aes";
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ti,hwmods = "aes";
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reg = <0x53501000 0xa0>;
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interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
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};
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des: des@53701000 {
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compatible = "ti,omap4-des";
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ti,hwmods = "des";
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reg = <0x53701000 0xa0>;
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interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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};
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