mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 20:14:45 +07:00
bcb63314e2
Drop the FSF's postal address from the source code files that typically
contain mostly the license text. Of the 628 removed instances, 578 are
outdated.
The patch has been created with the following command without manual edits:
git grep -l "675 Mass Ave\|59 Temple Place\|51 Franklin St" -- \
drivers/media/ include/media|while read i; do i=$i perl -e '
open(F,"< $ENV{i}");
$a=join("", <F>);
$a =~ s/[ \t]*\*\n.*You should.*\n.*along with.*\n.*(\n.*USA.*$)?\n//m
&& $a =~ s/(^.*)Or, (point your browser to) /$1To obtain the license, $2\n$1/m;
close(F);
open(F, "> $ENV{i}");
print F $a;
close(F);'; done
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
57 lines
1.4 KiB
C
57 lines
1.4 KiB
C
/*
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* Driver for Maxim MAX2165 silicon tuner
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*
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* Copyright (c) 2009 David T. L. Wong <davidtlwong@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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*
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* GNU General Public License for more details.
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*/
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#ifndef __MAX2165_PRIV_H__
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#define __MAX2165_PRIV_H__
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#define REG_NDIV_INT 0x00
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#define REG_NDIV_FRAC2 0x01
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#define REG_NDIV_FRAC1 0x02
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#define REG_NDIV_FRAC0 0x03
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#define REG_TRACK_FILTER 0x04
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#define REG_LNA 0x05
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#define REG_PLL_CFG 0x06
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#define REG_TEST 0x07
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#define REG_SHUTDOWN 0x08
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#define REG_VCO_CTRL 0x09
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#define REG_BASEBAND_CTRL 0x0A
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#define REG_DC_OFFSET_CTRL 0x0B
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#define REG_DC_OFFSET_DAC 0x0C
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#define REG_ROM_TABLE_ADDR 0x0D
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/* Read Only Registers */
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#define REG_ROM_TABLE_DATA 0x10
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#define REG_STATUS 0x11
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#define REG_AUTOTUNE 0x12
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struct max2165_priv {
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struct max2165_config *config;
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struct i2c_adapter *i2c;
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u32 frequency;
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u32 bandwidth;
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u8 tf_ntch_low_cfg;
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u8 tf_ntch_hi_cfg;
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u8 tf_balun_low_ref;
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u8 tf_balun_hi_ref;
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u8 bb_filter_7mhz_cfg;
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u8 bb_filter_8mhz_cfg;
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};
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#endif
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