mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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f36598aeca
Patch from Richard Purdie This change makes the soc pcmcia interfaces available earlier in the boot process meaning devices like CF microdrives can be used for the root filesystem. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
255 lines
6.5 KiB
C
255 lines
6.5 KiB
C
/*======================================================================
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Device driver for the PCMCIA control functionality of PXA2xx
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microprocessors.
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The contents of this file may be used under the
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terms of the GNU Public License version 2 (the "GPL")
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(c) Ian Molton (spyro@f2s.com) 2003
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(c) Stefan Eletzhofer (stefan.eletzhofer@inquant.de) 2003,4
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derived from sa11xx_base.c
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Portions created by John G. Dorsey are
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Copyright (C) 1999 John G. Dorsey.
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======================================================================*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/config.h>
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#include <linux/cpufreq.h>
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#include <linux/ioport.h>
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#include <linux/kernel.h>
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#include <linux/spinlock.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/system.h>
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#include <asm/arch/pxa-regs.h>
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#include <pcmcia/cs_types.h>
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#include <pcmcia/ss.h>
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#include <pcmcia/bulkmem.h>
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#include <pcmcia/cistpl.h>
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#include "cs_internal.h"
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#include "soc_common.h"
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#include "pxa2xx_base.h"
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#define MCXX_SETUP_MASK (0x7f)
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#define MCXX_ASST_MASK (0x1f)
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#define MCXX_HOLD_MASK (0x3f)
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#define MCXX_SETUP_SHIFT (0)
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#define MCXX_ASST_SHIFT (7)
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#define MCXX_HOLD_SHIFT (14)
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static inline u_int pxa2xx_mcxx_hold(u_int pcmcia_cycle_ns,
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u_int mem_clk_10khz)
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{
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u_int code = pcmcia_cycle_ns * mem_clk_10khz;
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return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
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}
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static inline u_int pxa2xx_mcxx_asst(u_int pcmcia_cycle_ns,
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u_int mem_clk_10khz)
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{
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u_int code = pcmcia_cycle_ns * mem_clk_10khz;
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return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
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}
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static inline u_int pxa2xx_mcxx_setup(u_int pcmcia_cycle_ns,
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u_int mem_clk_10khz)
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{
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u_int code = pcmcia_cycle_ns * mem_clk_10khz;
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return (code / 100000) + ((code % 100000) ? 1 : 0) - 1;
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}
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/* This function returns the (approximate) command assertion period, in
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* nanoseconds, for a given CPU clock frequency and MCXX_ASST value:
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*/
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static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz,
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u_int pcmcia_mcxx_asst)
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{
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return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz);
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}
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static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock )
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{
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MCMEM(sock) = ((pxa2xx_mcxx_setup(speed, clock)
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& MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
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| ((pxa2xx_mcxx_asst(speed, clock)
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& MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
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| ((pxa2xx_mcxx_hold(speed, clock)
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& MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
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return 0;
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}
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static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock )
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{
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MCIO(sock) = ((pxa2xx_mcxx_setup(speed, clock)
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& MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
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| ((pxa2xx_mcxx_asst(speed, clock)
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& MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
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| ((pxa2xx_mcxx_hold(speed, clock)
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& MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
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return 0;
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}
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static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock )
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{
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MCATT(sock) = ((pxa2xx_mcxx_setup(speed, clock)
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& MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
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| ((pxa2xx_mcxx_asst(speed, clock)
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& MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
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| ((pxa2xx_mcxx_hold(speed, clock)
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& MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
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return 0;
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}
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static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk)
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{
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struct soc_pcmcia_timing timing;
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int sock = skt->nr;
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soc_common_pcmcia_get_timing(skt, &timing);
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pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk);
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pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk);
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pxa2xx_pcmcia_set_mcio(sock, timing.io, clk);
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return 0;
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}
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static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
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{
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unsigned int clk = get_memclk_frequency_10khz();
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return pxa2xx_pcmcia_set_mcxx(skt, clk);
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}
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#ifdef CONFIG_CPU_FREQ
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static int
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pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
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unsigned long val,
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struct cpufreq_freqs *freqs)
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{
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#warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock"
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switch (val) {
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case CPUFREQ_PRECHANGE:
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if (freqs->new > freqs->old) {
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debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, "
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"pre-updating\n",
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freqs->new / 1000, (freqs->new / 100) % 10,
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freqs->old / 1000, (freqs->old / 100) % 10);
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pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
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}
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break;
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case CPUFREQ_POSTCHANGE:
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if (freqs->new < freqs->old) {
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debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, "
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"post-updating\n",
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freqs->new / 1000, (freqs->new / 100) % 10,
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freqs->old / 1000, (freqs->old / 100) % 10);
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pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
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}
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break;
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}
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return 0;
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}
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#endif
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int pxa2xx_drv_pcmcia_probe(struct device *dev)
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{
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int ret;
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struct pcmcia_low_level *ops;
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int first, nr;
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if (!dev || !dev->platform_data)
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return -ENODEV;
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ops = (struct pcmcia_low_level *)dev->platform_data;
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first = ops->first;
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nr = ops->nr;
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/* Provide our PXA2xx specific timing routines. */
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ops->set_timing = pxa2xx_pcmcia_set_timing;
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#ifdef CONFIG_CPU_FREQ
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ops->frequency_change = pxa2xx_pcmcia_frequency_change;
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#endif
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ret = soc_common_drv_pcmcia_probe(dev, ops, first, nr);
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if (ret == 0) {
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/*
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* We have at least one socket, so set MECR:CIT
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* (Card Is There)
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*/
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MECR |= MECR_CIT;
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/* Set MECR:NOS (Number Of Sockets) */
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if (nr > 1)
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MECR |= MECR_NOS;
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else
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MECR &= ~MECR_NOS;
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}
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return ret;
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}
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EXPORT_SYMBOL(pxa2xx_drv_pcmcia_probe);
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static int pxa2xx_drv_pcmcia_suspend(struct device *dev, pm_message_t state, u32 level)
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{
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int ret = 0;
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if (level == SUSPEND_SAVE_STATE)
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ret = pcmcia_socket_dev_suspend(dev, state);
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return ret;
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}
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static int pxa2xx_drv_pcmcia_resume(struct device *dev, u32 level)
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{
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int ret = 0;
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if (level == RESUME_RESTORE_STATE)
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{
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struct pcmcia_low_level *ops = dev->platform_data;
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int nr = ops ? ops->nr : 0;
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MECR = nr > 1 ? MECR_CIT | MECR_NOS : (nr > 0 ? MECR_CIT : 0);
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ret = pcmcia_socket_dev_resume(dev);
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}
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return ret;
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}
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static struct device_driver pxa2xx_pcmcia_driver = {
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.probe = pxa2xx_drv_pcmcia_probe,
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.remove = soc_common_drv_pcmcia_remove,
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.suspend = pxa2xx_drv_pcmcia_suspend,
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.resume = pxa2xx_drv_pcmcia_resume,
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.name = "pxa2xx-pcmcia",
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.bus = &platform_bus_type,
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};
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static int __init pxa2xx_pcmcia_init(void)
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{
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return driver_register(&pxa2xx_pcmcia_driver);
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}
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static void __exit pxa2xx_pcmcia_exit(void)
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{
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driver_unregister(&pxa2xx_pcmcia_driver);
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}
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fs_initcall(pxa2xx_pcmcia_init);
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module_exit(pxa2xx_pcmcia_exit);
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MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>");
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MODULE_DESCRIPTION("Linux PCMCIA Card Services: PXA2xx core socket driver");
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MODULE_LICENSE("GPL");
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