linux_dsm_epyc7002/drivers/gpu/drm/i915/gt
Tvrtko Ursulin 6c2b0103ad drm/i915: Fix and improve MCR selection logic
A couple issues were present in this code:

1.
fls() usage was incorrect causing off by one in subslice mask lookup,
which in other words means subslice mask of all zeroes is always used
(subslice mask of a slice which is not present, or even out of bounds
array access), rendering the checks in wa_init_mcr either futile or
random.

2.
Condition in WARN_ON was not correct. It is doing a bitwise and operation
between a positive (present subslices) and negative mask (disabled L3
banks).

This means that with corrected fls() usage the assert would always
incorrectly fail.

We could fix this by inverting the fuse bits in the check, but instead do
one better and improve the code so it not only asserts, but finds the
first common index between the two masks and only warns if no such index
can be found.

v2:
 * Simplify check for logic and redability.
 * Improve commentary explaining what is really happening ie. what the
   assert is really trying to check and why.

v3:
 * Find first common index instead of just asserting.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Fixes: fe864b76c2 ("drm/i915: Implement WaProgramMgsrForL3BankSpecificMmioReads")
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> # v1
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190717180624.20354-4-tvrtko.ursulin@linux.intel.com
2019-07-19 15:35:19 +01:00
..
selftests drm/i915: Rename i915_timeline to intel_timeline and move under gt 2019-06-21 13:48:53 +01:00
uc drm/i915/uc: kill <g,h>uc_to_i915 2019-07-13 20:11:54 +01:00
gen6_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen7_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen8_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen9_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
intel_breadcrumbs.c
intel_context_types.h drm/i915/execlists: Preempt-to-busy 2019-06-20 16:52:36 +01:00
intel_context.c drm/i915/oa: Reconfigure contexts on the fly 2019-07-17 07:58:27 +01:00
intel_context.h drm/i915/oa: Reconfigure contexts on the fly 2019-07-17 07:58:27 +01:00
intel_engine_cs.c drm/i915: Fix and improve MCR selection logic 2019-07-19 15:35:19 +01:00
intel_engine_pm.c drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
intel_engine_pm.h drm/i915: Lift intel_engines_resume() to callers 2019-06-26 18:01:01 +01:00
intel_engine_types.h drm/i915/guc: Remove preemption support for current fw 2019-07-11 11:09:33 +01:00
intel_engine.h drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
intel_gpu_commands.h drm/i915/selftests: Ensure we don't clamp a random offset to 32b 2019-07-11 10:06:37 +01:00
intel_gt_pm.c drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
intel_gt_pm.h drm/i915: Lift intel_engines_resume() to callers 2019-06-26 18:01:01 +01:00
intel_gt_types.h drm/i915/guc: prefer intel_gt in guc interrupt functions 2019-07-13 20:11:36 +01:00
intel_gt.c drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
intel_gt.h drm/i915/uc: prefer intel_gt over i915 in GuC/HuC paths 2019-07-13 20:08:44 +01:00
intel_hangcheck.c drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
intel_lrc_reg.h
intel_lrc.c drm/i915/execlists: Cancel breadcrumb on preempting the virtual engine 2019-07-19 12:53:29 +01:00
intel_lrc.h
intel_mocs.c drm/i915/gt: Use caller provided forcewake for intel_mocs_init_engine 2019-07-04 14:42:38 +01:00
intel_mocs.h drm/i915: Convert intel_mocs_init_l3cc_table to intel_gt 2019-06-21 13:48:28 +01:00
intel_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
intel_renderstate.h drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
intel_reset_types.h drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
intel_reset.c drm/i915/gt: Push engine stopping into reset-prepare 2019-07-17 18:47:00 +01:00
intel_reset.h drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
intel_ringbuffer.c drm/i915/gt: Push engine stopping into reset-prepare 2019-07-17 18:47:00 +01:00
intel_sseu.c
intel_sseu.h
intel_timeline_types.h drm/i915: Rename i915_timeline to intel_timeline and move under gt 2019-06-21 13:48:53 +01:00
intel_timeline.c drm/i915/gt: Always call kref_init for the timeline 2019-06-26 07:25:54 +01:00
intel_timeline.h drm/i915: Rename i915_timeline to intel_timeline and move under gt 2019-06-21 13:48:53 +01:00
intel_workarounds_types.h drm/i915: Add engine name to workaround debug print 2019-07-12 09:55:30 +01:00
intel_workarounds.c drm/i915: Fix and improve MCR selection logic 2019-07-19 15:35:19 +01:00
intel_workarounds.h drm/i915: Convert gt workarounds to intel_gt 2019-06-21 13:48:25 +01:00
Makefile drm/i915: add header search path to subdir Makefiles 2019-06-27 10:25:48 +03:00
Makefile.header-test
mock_engine.c drm/i915: Provide an i915_active.acquire callback 2019-06-21 19:47:55 +01:00
mock_engine.h
selftest_engine_cs.c
selftest_hangcheck.c drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
selftest_lrc.c drm/i915/execlists: Disable preemption under GVT 2019-07-16 14:06:45 +01:00
selftest_reset.c drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
selftest_timeline.c drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
selftest_workarounds.c drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00