mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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4635742d1c
The new stack validator in objdump doesn't like directly assigning r11
to rsp, warning with something like:
warning: objtool: chacha20_4block_xor_ssse3()+0xa: unsupported stack pointer realignment
warning: objtool: chacha20_8block_xor_avx2()+0x6: unsupported stack pointer realignment
This fixes things up to use code similar to gcc's DRAP register, so that
objdump remains happy.
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Fixes: baa41469a7 ("objtool: Implement stack validation 2.0")
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
449 lines
13 KiB
ArmAsm
449 lines
13 KiB
ArmAsm
/*
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* ChaCha20 256-bit cipher algorithm, RFC7539, x64 AVX2 functions
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*
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* Copyright (C) 2015 Martin Willi
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/linkage.h>
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.section .rodata.cst32.ROT8, "aM", @progbits, 32
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.align 32
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ROT8: .octa 0x0e0d0c0f0a09080b0605040702010003
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.octa 0x0e0d0c0f0a09080b0605040702010003
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.section .rodata.cst32.ROT16, "aM", @progbits, 32
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.align 32
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ROT16: .octa 0x0d0c0f0e09080b0a0504070601000302
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.octa 0x0d0c0f0e09080b0a0504070601000302
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.section .rodata.cst32.CTRINC, "aM", @progbits, 32
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.align 32
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CTRINC: .octa 0x00000003000000020000000100000000
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.octa 0x00000007000000060000000500000004
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.text
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ENTRY(chacha20_8block_xor_avx2)
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# %rdi: Input state matrix, s
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# %rsi: 8 data blocks output, o
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# %rdx: 8 data blocks input, i
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# This function encrypts eight consecutive ChaCha20 blocks by loading
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# the state matrix in AVX registers eight times. As we need some
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# scratch registers, we save the first four registers on the stack. The
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# algorithm performs each operation on the corresponding word of each
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# state matrix, hence requires no word shuffling. For final XORing step
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# we transpose the matrix by interleaving 32-, 64- and then 128-bit
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# words, which allows us to do XOR in AVX registers. 8/16-bit word
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# rotation is done with the slightly better performing byte shuffling,
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# 7/12-bit word rotation uses traditional shift+OR.
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vzeroupper
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# 4 * 32 byte stack, 32-byte aligned
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lea 8(%rsp),%r10
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and $~31, %rsp
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sub $0x80, %rsp
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# x0..15[0-7] = s[0..15]
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vpbroadcastd 0x00(%rdi),%ymm0
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vpbroadcastd 0x04(%rdi),%ymm1
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vpbroadcastd 0x08(%rdi),%ymm2
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vpbroadcastd 0x0c(%rdi),%ymm3
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vpbroadcastd 0x10(%rdi),%ymm4
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vpbroadcastd 0x14(%rdi),%ymm5
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vpbroadcastd 0x18(%rdi),%ymm6
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vpbroadcastd 0x1c(%rdi),%ymm7
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vpbroadcastd 0x20(%rdi),%ymm8
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vpbroadcastd 0x24(%rdi),%ymm9
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vpbroadcastd 0x28(%rdi),%ymm10
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vpbroadcastd 0x2c(%rdi),%ymm11
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vpbroadcastd 0x30(%rdi),%ymm12
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vpbroadcastd 0x34(%rdi),%ymm13
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vpbroadcastd 0x38(%rdi),%ymm14
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vpbroadcastd 0x3c(%rdi),%ymm15
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# x0..3 on stack
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vmovdqa %ymm0,0x00(%rsp)
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vmovdqa %ymm1,0x20(%rsp)
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vmovdqa %ymm2,0x40(%rsp)
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vmovdqa %ymm3,0x60(%rsp)
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vmovdqa CTRINC(%rip),%ymm1
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vmovdqa ROT8(%rip),%ymm2
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vmovdqa ROT16(%rip),%ymm3
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# x12 += counter values 0-3
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vpaddd %ymm1,%ymm12,%ymm12
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mov $10,%ecx
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.Ldoubleround8:
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# x0 += x4, x12 = rotl32(x12 ^ x0, 16)
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vpaddd 0x00(%rsp),%ymm4,%ymm0
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vmovdqa %ymm0,0x00(%rsp)
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vpxor %ymm0,%ymm12,%ymm12
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vpshufb %ymm3,%ymm12,%ymm12
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# x1 += x5, x13 = rotl32(x13 ^ x1, 16)
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vpaddd 0x20(%rsp),%ymm5,%ymm0
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vmovdqa %ymm0,0x20(%rsp)
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vpxor %ymm0,%ymm13,%ymm13
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vpshufb %ymm3,%ymm13,%ymm13
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# x2 += x6, x14 = rotl32(x14 ^ x2, 16)
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vpaddd 0x40(%rsp),%ymm6,%ymm0
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vmovdqa %ymm0,0x40(%rsp)
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vpxor %ymm0,%ymm14,%ymm14
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vpshufb %ymm3,%ymm14,%ymm14
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# x3 += x7, x15 = rotl32(x15 ^ x3, 16)
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vpaddd 0x60(%rsp),%ymm7,%ymm0
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vmovdqa %ymm0,0x60(%rsp)
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vpxor %ymm0,%ymm15,%ymm15
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vpshufb %ymm3,%ymm15,%ymm15
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# x8 += x12, x4 = rotl32(x4 ^ x8, 12)
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vpaddd %ymm12,%ymm8,%ymm8
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vpxor %ymm8,%ymm4,%ymm4
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vpslld $12,%ymm4,%ymm0
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vpsrld $20,%ymm4,%ymm4
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vpor %ymm0,%ymm4,%ymm4
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# x9 += x13, x5 = rotl32(x5 ^ x9, 12)
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vpaddd %ymm13,%ymm9,%ymm9
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vpxor %ymm9,%ymm5,%ymm5
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vpslld $12,%ymm5,%ymm0
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vpsrld $20,%ymm5,%ymm5
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vpor %ymm0,%ymm5,%ymm5
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# x10 += x14, x6 = rotl32(x6 ^ x10, 12)
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vpaddd %ymm14,%ymm10,%ymm10
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vpxor %ymm10,%ymm6,%ymm6
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vpslld $12,%ymm6,%ymm0
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vpsrld $20,%ymm6,%ymm6
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vpor %ymm0,%ymm6,%ymm6
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# x11 += x15, x7 = rotl32(x7 ^ x11, 12)
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vpaddd %ymm15,%ymm11,%ymm11
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vpxor %ymm11,%ymm7,%ymm7
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vpslld $12,%ymm7,%ymm0
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vpsrld $20,%ymm7,%ymm7
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vpor %ymm0,%ymm7,%ymm7
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# x0 += x4, x12 = rotl32(x12 ^ x0, 8)
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vpaddd 0x00(%rsp),%ymm4,%ymm0
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vmovdqa %ymm0,0x00(%rsp)
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vpxor %ymm0,%ymm12,%ymm12
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vpshufb %ymm2,%ymm12,%ymm12
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# x1 += x5, x13 = rotl32(x13 ^ x1, 8)
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vpaddd 0x20(%rsp),%ymm5,%ymm0
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vmovdqa %ymm0,0x20(%rsp)
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vpxor %ymm0,%ymm13,%ymm13
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vpshufb %ymm2,%ymm13,%ymm13
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# x2 += x6, x14 = rotl32(x14 ^ x2, 8)
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vpaddd 0x40(%rsp),%ymm6,%ymm0
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vmovdqa %ymm0,0x40(%rsp)
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vpxor %ymm0,%ymm14,%ymm14
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vpshufb %ymm2,%ymm14,%ymm14
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# x3 += x7, x15 = rotl32(x15 ^ x3, 8)
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vpaddd 0x60(%rsp),%ymm7,%ymm0
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vmovdqa %ymm0,0x60(%rsp)
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vpxor %ymm0,%ymm15,%ymm15
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vpshufb %ymm2,%ymm15,%ymm15
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# x8 += x12, x4 = rotl32(x4 ^ x8, 7)
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vpaddd %ymm12,%ymm8,%ymm8
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vpxor %ymm8,%ymm4,%ymm4
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vpslld $7,%ymm4,%ymm0
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vpsrld $25,%ymm4,%ymm4
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vpor %ymm0,%ymm4,%ymm4
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# x9 += x13, x5 = rotl32(x5 ^ x9, 7)
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vpaddd %ymm13,%ymm9,%ymm9
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vpxor %ymm9,%ymm5,%ymm5
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vpslld $7,%ymm5,%ymm0
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vpsrld $25,%ymm5,%ymm5
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vpor %ymm0,%ymm5,%ymm5
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# x10 += x14, x6 = rotl32(x6 ^ x10, 7)
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vpaddd %ymm14,%ymm10,%ymm10
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vpxor %ymm10,%ymm6,%ymm6
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vpslld $7,%ymm6,%ymm0
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vpsrld $25,%ymm6,%ymm6
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vpor %ymm0,%ymm6,%ymm6
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# x11 += x15, x7 = rotl32(x7 ^ x11, 7)
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vpaddd %ymm15,%ymm11,%ymm11
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vpxor %ymm11,%ymm7,%ymm7
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vpslld $7,%ymm7,%ymm0
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vpsrld $25,%ymm7,%ymm7
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vpor %ymm0,%ymm7,%ymm7
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# x0 += x5, x15 = rotl32(x15 ^ x0, 16)
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vpaddd 0x00(%rsp),%ymm5,%ymm0
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vmovdqa %ymm0,0x00(%rsp)
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vpxor %ymm0,%ymm15,%ymm15
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vpshufb %ymm3,%ymm15,%ymm15
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# x1 += x6, x12 = rotl32(x12 ^ x1, 16)%ymm0
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vpaddd 0x20(%rsp),%ymm6,%ymm0
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vmovdqa %ymm0,0x20(%rsp)
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vpxor %ymm0,%ymm12,%ymm12
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vpshufb %ymm3,%ymm12,%ymm12
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# x2 += x7, x13 = rotl32(x13 ^ x2, 16)
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vpaddd 0x40(%rsp),%ymm7,%ymm0
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vmovdqa %ymm0,0x40(%rsp)
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vpxor %ymm0,%ymm13,%ymm13
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vpshufb %ymm3,%ymm13,%ymm13
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# x3 += x4, x14 = rotl32(x14 ^ x3, 16)
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vpaddd 0x60(%rsp),%ymm4,%ymm0
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vmovdqa %ymm0,0x60(%rsp)
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vpxor %ymm0,%ymm14,%ymm14
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vpshufb %ymm3,%ymm14,%ymm14
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# x10 += x15, x5 = rotl32(x5 ^ x10, 12)
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vpaddd %ymm15,%ymm10,%ymm10
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vpxor %ymm10,%ymm5,%ymm5
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vpslld $12,%ymm5,%ymm0
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vpsrld $20,%ymm5,%ymm5
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vpor %ymm0,%ymm5,%ymm5
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# x11 += x12, x6 = rotl32(x6 ^ x11, 12)
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vpaddd %ymm12,%ymm11,%ymm11
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vpxor %ymm11,%ymm6,%ymm6
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vpslld $12,%ymm6,%ymm0
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vpsrld $20,%ymm6,%ymm6
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vpor %ymm0,%ymm6,%ymm6
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# x8 += x13, x7 = rotl32(x7 ^ x8, 12)
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vpaddd %ymm13,%ymm8,%ymm8
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vpxor %ymm8,%ymm7,%ymm7
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vpslld $12,%ymm7,%ymm0
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vpsrld $20,%ymm7,%ymm7
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vpor %ymm0,%ymm7,%ymm7
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# x9 += x14, x4 = rotl32(x4 ^ x9, 12)
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vpaddd %ymm14,%ymm9,%ymm9
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vpxor %ymm9,%ymm4,%ymm4
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vpslld $12,%ymm4,%ymm0
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vpsrld $20,%ymm4,%ymm4
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vpor %ymm0,%ymm4,%ymm4
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# x0 += x5, x15 = rotl32(x15 ^ x0, 8)
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vpaddd 0x00(%rsp),%ymm5,%ymm0
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vmovdqa %ymm0,0x00(%rsp)
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vpxor %ymm0,%ymm15,%ymm15
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vpshufb %ymm2,%ymm15,%ymm15
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# x1 += x6, x12 = rotl32(x12 ^ x1, 8)
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vpaddd 0x20(%rsp),%ymm6,%ymm0
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vmovdqa %ymm0,0x20(%rsp)
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vpxor %ymm0,%ymm12,%ymm12
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vpshufb %ymm2,%ymm12,%ymm12
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# x2 += x7, x13 = rotl32(x13 ^ x2, 8)
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vpaddd 0x40(%rsp),%ymm7,%ymm0
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vmovdqa %ymm0,0x40(%rsp)
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vpxor %ymm0,%ymm13,%ymm13
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vpshufb %ymm2,%ymm13,%ymm13
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# x3 += x4, x14 = rotl32(x14 ^ x3, 8)
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vpaddd 0x60(%rsp),%ymm4,%ymm0
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vmovdqa %ymm0,0x60(%rsp)
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vpxor %ymm0,%ymm14,%ymm14
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vpshufb %ymm2,%ymm14,%ymm14
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# x10 += x15, x5 = rotl32(x5 ^ x10, 7)
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vpaddd %ymm15,%ymm10,%ymm10
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vpxor %ymm10,%ymm5,%ymm5
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vpslld $7,%ymm5,%ymm0
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vpsrld $25,%ymm5,%ymm5
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vpor %ymm0,%ymm5,%ymm5
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# x11 += x12, x6 = rotl32(x6 ^ x11, 7)
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vpaddd %ymm12,%ymm11,%ymm11
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vpxor %ymm11,%ymm6,%ymm6
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vpslld $7,%ymm6,%ymm0
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vpsrld $25,%ymm6,%ymm6
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vpor %ymm0,%ymm6,%ymm6
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# x8 += x13, x7 = rotl32(x7 ^ x8, 7)
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vpaddd %ymm13,%ymm8,%ymm8
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vpxor %ymm8,%ymm7,%ymm7
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vpslld $7,%ymm7,%ymm0
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vpsrld $25,%ymm7,%ymm7
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vpor %ymm0,%ymm7,%ymm7
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# x9 += x14, x4 = rotl32(x4 ^ x9, 7)
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vpaddd %ymm14,%ymm9,%ymm9
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vpxor %ymm9,%ymm4,%ymm4
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vpslld $7,%ymm4,%ymm0
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vpsrld $25,%ymm4,%ymm4
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vpor %ymm0,%ymm4,%ymm4
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dec %ecx
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jnz .Ldoubleround8
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# x0..15[0-3] += s[0..15]
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vpbroadcastd 0x00(%rdi),%ymm0
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vpaddd 0x00(%rsp),%ymm0,%ymm0
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vmovdqa %ymm0,0x00(%rsp)
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vpbroadcastd 0x04(%rdi),%ymm0
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vpaddd 0x20(%rsp),%ymm0,%ymm0
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vmovdqa %ymm0,0x20(%rsp)
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vpbroadcastd 0x08(%rdi),%ymm0
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vpaddd 0x40(%rsp),%ymm0,%ymm0
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vmovdqa %ymm0,0x40(%rsp)
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vpbroadcastd 0x0c(%rdi),%ymm0
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vpaddd 0x60(%rsp),%ymm0,%ymm0
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vmovdqa %ymm0,0x60(%rsp)
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vpbroadcastd 0x10(%rdi),%ymm0
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vpaddd %ymm0,%ymm4,%ymm4
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vpbroadcastd 0x14(%rdi),%ymm0
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vpaddd %ymm0,%ymm5,%ymm5
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vpbroadcastd 0x18(%rdi),%ymm0
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vpaddd %ymm0,%ymm6,%ymm6
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vpbroadcastd 0x1c(%rdi),%ymm0
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vpaddd %ymm0,%ymm7,%ymm7
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vpbroadcastd 0x20(%rdi),%ymm0
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vpaddd %ymm0,%ymm8,%ymm8
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vpbroadcastd 0x24(%rdi),%ymm0
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vpaddd %ymm0,%ymm9,%ymm9
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vpbroadcastd 0x28(%rdi),%ymm0
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vpaddd %ymm0,%ymm10,%ymm10
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vpbroadcastd 0x2c(%rdi),%ymm0
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vpaddd %ymm0,%ymm11,%ymm11
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vpbroadcastd 0x30(%rdi),%ymm0
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vpaddd %ymm0,%ymm12,%ymm12
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vpbroadcastd 0x34(%rdi),%ymm0
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vpaddd %ymm0,%ymm13,%ymm13
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vpbroadcastd 0x38(%rdi),%ymm0
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vpaddd %ymm0,%ymm14,%ymm14
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vpbroadcastd 0x3c(%rdi),%ymm0
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vpaddd %ymm0,%ymm15,%ymm15
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# x12 += counter values 0-3
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vpaddd %ymm1,%ymm12,%ymm12
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# interleave 32-bit words in state n, n+1
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vmovdqa 0x00(%rsp),%ymm0
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vmovdqa 0x20(%rsp),%ymm1
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vpunpckldq %ymm1,%ymm0,%ymm2
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vpunpckhdq %ymm1,%ymm0,%ymm1
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vmovdqa %ymm2,0x00(%rsp)
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vmovdqa %ymm1,0x20(%rsp)
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vmovdqa 0x40(%rsp),%ymm0
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vmovdqa 0x60(%rsp),%ymm1
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vpunpckldq %ymm1,%ymm0,%ymm2
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vpunpckhdq %ymm1,%ymm0,%ymm1
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vmovdqa %ymm2,0x40(%rsp)
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vmovdqa %ymm1,0x60(%rsp)
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vmovdqa %ymm4,%ymm0
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vpunpckldq %ymm5,%ymm0,%ymm4
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vpunpckhdq %ymm5,%ymm0,%ymm5
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vmovdqa %ymm6,%ymm0
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vpunpckldq %ymm7,%ymm0,%ymm6
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vpunpckhdq %ymm7,%ymm0,%ymm7
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vmovdqa %ymm8,%ymm0
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vpunpckldq %ymm9,%ymm0,%ymm8
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vpunpckhdq %ymm9,%ymm0,%ymm9
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vmovdqa %ymm10,%ymm0
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vpunpckldq %ymm11,%ymm0,%ymm10
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vpunpckhdq %ymm11,%ymm0,%ymm11
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vmovdqa %ymm12,%ymm0
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vpunpckldq %ymm13,%ymm0,%ymm12
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vpunpckhdq %ymm13,%ymm0,%ymm13
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vmovdqa %ymm14,%ymm0
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vpunpckldq %ymm15,%ymm0,%ymm14
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vpunpckhdq %ymm15,%ymm0,%ymm15
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# interleave 64-bit words in state n, n+2
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vmovdqa 0x00(%rsp),%ymm0
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vmovdqa 0x40(%rsp),%ymm2
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vpunpcklqdq %ymm2,%ymm0,%ymm1
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vpunpckhqdq %ymm2,%ymm0,%ymm2
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vmovdqa %ymm1,0x00(%rsp)
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vmovdqa %ymm2,0x40(%rsp)
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vmovdqa 0x20(%rsp),%ymm0
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vmovdqa 0x60(%rsp),%ymm2
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vpunpcklqdq %ymm2,%ymm0,%ymm1
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vpunpckhqdq %ymm2,%ymm0,%ymm2
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vmovdqa %ymm1,0x20(%rsp)
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vmovdqa %ymm2,0x60(%rsp)
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vmovdqa %ymm4,%ymm0
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vpunpcklqdq %ymm6,%ymm0,%ymm4
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vpunpckhqdq %ymm6,%ymm0,%ymm6
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vmovdqa %ymm5,%ymm0
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vpunpcklqdq %ymm7,%ymm0,%ymm5
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vpunpckhqdq %ymm7,%ymm0,%ymm7
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vmovdqa %ymm8,%ymm0
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vpunpcklqdq %ymm10,%ymm0,%ymm8
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vpunpckhqdq %ymm10,%ymm0,%ymm10
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vmovdqa %ymm9,%ymm0
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vpunpcklqdq %ymm11,%ymm0,%ymm9
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vpunpckhqdq %ymm11,%ymm0,%ymm11
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vmovdqa %ymm12,%ymm0
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vpunpcklqdq %ymm14,%ymm0,%ymm12
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vpunpckhqdq %ymm14,%ymm0,%ymm14
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vmovdqa %ymm13,%ymm0
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vpunpcklqdq %ymm15,%ymm0,%ymm13
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vpunpckhqdq %ymm15,%ymm0,%ymm15
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# interleave 128-bit words in state n, n+4
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vmovdqa 0x00(%rsp),%ymm0
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vperm2i128 $0x20,%ymm4,%ymm0,%ymm1
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vperm2i128 $0x31,%ymm4,%ymm0,%ymm4
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vmovdqa %ymm1,0x00(%rsp)
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vmovdqa 0x20(%rsp),%ymm0
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vperm2i128 $0x20,%ymm5,%ymm0,%ymm1
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vperm2i128 $0x31,%ymm5,%ymm0,%ymm5
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vmovdqa %ymm1,0x20(%rsp)
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vmovdqa 0x40(%rsp),%ymm0
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vperm2i128 $0x20,%ymm6,%ymm0,%ymm1
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vperm2i128 $0x31,%ymm6,%ymm0,%ymm6
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vmovdqa %ymm1,0x40(%rsp)
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vmovdqa 0x60(%rsp),%ymm0
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vperm2i128 $0x20,%ymm7,%ymm0,%ymm1
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vperm2i128 $0x31,%ymm7,%ymm0,%ymm7
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vmovdqa %ymm1,0x60(%rsp)
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vperm2i128 $0x20,%ymm12,%ymm8,%ymm0
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vperm2i128 $0x31,%ymm12,%ymm8,%ymm12
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vmovdqa %ymm0,%ymm8
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vperm2i128 $0x20,%ymm13,%ymm9,%ymm0
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vperm2i128 $0x31,%ymm13,%ymm9,%ymm13
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vmovdqa %ymm0,%ymm9
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vperm2i128 $0x20,%ymm14,%ymm10,%ymm0
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vperm2i128 $0x31,%ymm14,%ymm10,%ymm14
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vmovdqa %ymm0,%ymm10
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vperm2i128 $0x20,%ymm15,%ymm11,%ymm0
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vperm2i128 $0x31,%ymm15,%ymm11,%ymm15
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vmovdqa %ymm0,%ymm11
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|
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# xor with corresponding input, write to output
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vmovdqa 0x00(%rsp),%ymm0
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vpxor 0x0000(%rdx),%ymm0,%ymm0
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vmovdqu %ymm0,0x0000(%rsi)
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vmovdqa 0x20(%rsp),%ymm0
|
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vpxor 0x0080(%rdx),%ymm0,%ymm0
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vmovdqu %ymm0,0x0080(%rsi)
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vmovdqa 0x40(%rsp),%ymm0
|
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vpxor 0x0040(%rdx),%ymm0,%ymm0
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vmovdqu %ymm0,0x0040(%rsi)
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vmovdqa 0x60(%rsp),%ymm0
|
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vpxor 0x00c0(%rdx),%ymm0,%ymm0
|
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vmovdqu %ymm0,0x00c0(%rsi)
|
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vpxor 0x0100(%rdx),%ymm4,%ymm4
|
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vmovdqu %ymm4,0x0100(%rsi)
|
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vpxor 0x0180(%rdx),%ymm5,%ymm5
|
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vmovdqu %ymm5,0x00180(%rsi)
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vpxor 0x0140(%rdx),%ymm6,%ymm6
|
|
vmovdqu %ymm6,0x0140(%rsi)
|
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vpxor 0x01c0(%rdx),%ymm7,%ymm7
|
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vmovdqu %ymm7,0x01c0(%rsi)
|
|
vpxor 0x0020(%rdx),%ymm8,%ymm8
|
|
vmovdqu %ymm8,0x0020(%rsi)
|
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vpxor 0x00a0(%rdx),%ymm9,%ymm9
|
|
vmovdqu %ymm9,0x00a0(%rsi)
|
|
vpxor 0x0060(%rdx),%ymm10,%ymm10
|
|
vmovdqu %ymm10,0x0060(%rsi)
|
|
vpxor 0x00e0(%rdx),%ymm11,%ymm11
|
|
vmovdqu %ymm11,0x00e0(%rsi)
|
|
vpxor 0x0120(%rdx),%ymm12,%ymm12
|
|
vmovdqu %ymm12,0x0120(%rsi)
|
|
vpxor 0x01a0(%rdx),%ymm13,%ymm13
|
|
vmovdqu %ymm13,0x01a0(%rsi)
|
|
vpxor 0x0160(%rdx),%ymm14,%ymm14
|
|
vmovdqu %ymm14,0x0160(%rsi)
|
|
vpxor 0x01e0(%rdx),%ymm15,%ymm15
|
|
vmovdqu %ymm15,0x01e0(%rsi)
|
|
|
|
vzeroupper
|
|
lea -8(%r10),%rsp
|
|
ret
|
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ENDPROC(chacha20_8block_xor_avx2)
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