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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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b359ed5184
The flash controller implemented by the Arm Base platform behaves like the Intel StrataFlash J3 device, but omits several features. In particular it doesn't implement a protection register, so "Number of Protection register fields" in the Primary Vendor-Specific Extended Query, is 0. The Intel StrataFlash J3 datasheet only lists 1 as a valid value for NumProtectionFields. It describes the field as: "Number of Protection register fields in JEDEC ID space. “00h,” indicates that 256 protection bytes are available" While a value of 0 may arguably not be architecturally valid, the driver's current behavior is certainly wrong: if NumProtectionFields is 0, read_pri_intelext() adds a negative value to the unsigned extra_size, and ends up in an infinite loop. Fix it by ignoring a NumProtectionFields of 0. Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Tested-by: Sudeep Holla <sudeep.holla@arm.com> Tested-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> |
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| .. | ||
| cfi_cmdset_0001.c | ||
| cfi_cmdset_0002.c | ||
| cfi_cmdset_0020.c | ||
| cfi_probe.c | ||
| cfi_util.c | ||
| chipreg.c | ||
| fwh_lock.h | ||
| gen_probe.c | ||
| jedec_probe.c | ||
| Kconfig | ||
| Makefile | ||
| map_absent.c | ||
| map_ram.c | ||
| map_rom.c | ||