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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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06010fb588
Move the ifdeffery to a header file to make the logic more obvious where we decide between PCI or SBUS init Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
250 lines
5.5 KiB
C
250 lines
5.5 KiB
C
/* linux/arch/sparc/kernel/time.c
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*
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* Copyright (C) 1995 David S. Miller (davem@davemloft.net)
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* Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
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*
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* Chris Davis (cdavis@cois.on.ca) 03/27/1998
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* Added support for the intersil on the sun4/4200
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*
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* Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998
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* Support for MicroSPARC-IIep, PCI CPU.
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*
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* This file handles the Sparc specific time handling details.
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*
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* 1997-09-10 Updated NTP code according to technical memorandum Jan '96
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* "A Kernel Model for Precision Timekeeping" by Dave Mills
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*/
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/rtc.h>
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#include <linux/rtc/m48t59.h>
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#include <linux/timex.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/ioport.h>
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#include <linux/profile.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <asm/oplib.h>
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#include <asm/timex.h>
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#include <asm/timer.h>
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#include <asm/system.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/idprom.h>
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#include <asm/machines.h>
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#include <asm/page.h>
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#include <asm/pcic.h>
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#include <asm/irq_regs.h>
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#include "irq.h"
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DEFINE_SPINLOCK(rtc_lock);
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EXPORT_SYMBOL(rtc_lock);
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static int set_rtc_mmss(unsigned long);
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unsigned long profile_pc(struct pt_regs *regs)
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{
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extern char __copy_user_begin[], __copy_user_end[];
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extern char __atomic_begin[], __atomic_end[];
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extern char __bzero_begin[], __bzero_end[];
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unsigned long pc = regs->pc;
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if (in_lock_functions(pc) ||
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(pc >= (unsigned long) __copy_user_begin &&
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pc < (unsigned long) __copy_user_end) ||
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(pc >= (unsigned long) __atomic_begin &&
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pc < (unsigned long) __atomic_end) ||
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(pc >= (unsigned long) __bzero_begin &&
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pc < (unsigned long) __bzero_end))
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pc = regs->u_regs[UREG_RETPC];
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return pc;
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}
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EXPORT_SYMBOL(profile_pc);
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__volatile__ unsigned int *master_l10_counter;
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u32 (*do_arch_gettimeoffset)(void);
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int update_persistent_clock(struct timespec now)
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{
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return set_rtc_mmss(now.tv_sec);
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}
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/*
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* timer_interrupt() needs to keep up the real-time clock,
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* as well as call the "xtime_update()" routine every clocktick
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*/
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#define TICK_SIZE (tick_nsec / 1000)
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static irqreturn_t timer_interrupt(int dummy, void *dev_id)
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{
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#ifndef CONFIG_SMP
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profile_tick(CPU_PROFILING);
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#endif
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clear_clock_irq();
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xtime_update(1);
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#ifndef CONFIG_SMP
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update_process_times(user_mode(get_irq_regs()));
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#endif
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return IRQ_HANDLED;
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}
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static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct m48t59_plat_data *pdata = pdev->dev.platform_data;
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return readb(pdata->ioaddr + ofs);
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}
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static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct m48t59_plat_data *pdata = pdev->dev.platform_data;
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writeb(val, pdata->ioaddr + ofs);
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}
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static struct m48t59_plat_data m48t59_data = {
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.read_byte = mostek_read_byte,
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.write_byte = mostek_write_byte,
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};
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/* resource is set at runtime */
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static struct platform_device m48t59_rtc = {
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.name = "rtc-m48t59",
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.id = 0,
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.num_resources = 1,
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.dev = {
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.platform_data = &m48t59_data,
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},
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};
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static int __devinit clock_probe(struct platform_device *op)
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{
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struct device_node *dp = op->dev.of_node;
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const char *model = of_get_property(dp, "model", NULL);
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if (!model)
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return -ENODEV;
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/* Only the primary RTC has an address property */
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if (!of_find_property(dp, "address", NULL))
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return -ENODEV;
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m48t59_rtc.resource = &op->resource[0];
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if (!strcmp(model, "mk48t02")) {
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/* Map the clock register io area read-only */
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m48t59_data.ioaddr = of_ioremap(&op->resource[0], 0,
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2048, "rtc-m48t59");
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m48t59_data.type = M48T59RTC_TYPE_M48T02;
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} else if (!strcmp(model, "mk48t08")) {
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m48t59_data.ioaddr = of_ioremap(&op->resource[0], 0,
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8192, "rtc-m48t59");
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m48t59_data.type = M48T59RTC_TYPE_M48T08;
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} else
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return -ENODEV;
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if (platform_device_register(&m48t59_rtc) < 0)
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printk(KERN_ERR "Registering RTC device failed\n");
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return 0;
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}
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static struct of_device_id __initdata clock_match[] = {
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{
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.name = "eeprom",
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},
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{},
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};
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static struct platform_driver clock_driver = {
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.probe = clock_probe,
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.driver = {
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.name = "rtc",
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.owner = THIS_MODULE,
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.of_match_table = clock_match,
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},
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};
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/* Probe for the mostek real time clock chip. */
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static int __init clock_init(void)
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{
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return platform_driver_register(&clock_driver);
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}
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/* Must be after subsys_initcall() so that busses are probed. Must
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* be before device_initcall() because things like the RTC driver
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* need to see the clock registers.
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*/
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fs_initcall(clock_init);
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u32 sbus_do_gettimeoffset(void)
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{
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unsigned long val = *master_l10_counter;
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unsigned long usec = (val >> 10) & 0x1fffff;
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/* Limit hit? */
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if (val & 0x80000000)
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usec += 1000000 / HZ;
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return usec * 1000;
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}
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u32 arch_gettimeoffset(void)
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{
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if (unlikely(!do_arch_gettimeoffset))
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return 0;
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return do_arch_gettimeoffset();
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}
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static void __init sbus_time_init(void)
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{
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do_arch_gettimeoffset = sbus_do_gettimeoffset;
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btfixup();
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sparc_irq_config.init_timers(timer_interrupt);
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}
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void __init time_init(void)
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{
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if (pcic_present())
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pci_time_init();
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else
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sbus_time_init();
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}
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static int set_rtc_mmss(unsigned long secs)
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{
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struct rtc_device *rtc = rtc_class_open("rtc0");
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int err = -1;
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if (rtc) {
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err = rtc_set_mmss(rtc, secs);
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rtc_class_close(rtc);
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}
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return err;
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}
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