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5ed9d92f1b
The Allwinner A10 compatibles were following a slightly different compatible patterns than the rest of the SoCs for historical reasons. Move to the other pattern for consistency across all Allwinner Socs. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> [wsa: dropped binding OK as per http://lists.infradead.org/pipermail/linux-arm-kernel/2014-February/229438.html] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
45 lines
1.3 KiB
Plaintext
45 lines
1.3 KiB
Plaintext
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* Marvell MV64XXX I2C controller
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Required properties :
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- reg : Offset and length of the register set for the device
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- compatible : Should be either:
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- "allwinner,sun4i-a10-i2c"
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- "allwinner,sun6i-a31-i2c"
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- "marvell,mv64xxx-i2c"
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- "marvell,mv78230-i2c"
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- "marvell,mv78230-a0-i2c"
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* Note: Only use "marvell,mv78230-a0-i2c" for a
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very rare, initial version of the SoC which
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had broken offload support. Linux
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auto-detects this and sets it appropriately.
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- interrupts : The interrupt number
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Optional properties :
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- clock-frequency : Desired I2C bus clock frequency in Hz. If not set the
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default frequency is 100kHz
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- resets : phandle to the parent reset controller. Mandatory
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whenever you're using the "allwinner,sun6i-a31-i2c"
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compatible.
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Examples:
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i2c@11000 {
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compatible = "marvell,mv64xxx-i2c";
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reg = <0x11000 0x20>;
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interrupts = <29>;
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clock-frequency = <100000>;
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};
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For the Armada XP:
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i2c@11000 {
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compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
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reg = <0x11000 0x100>;
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interrupts = <29>;
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clock-frequency = <100000>;
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};
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