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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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3273fc63e1
Remove the modes timings tables for DMT modes and calculate the HW paremeters from the modes timings. Switch the DMT modes pixel clock calculation out of the static frequency list to a generic calculation from a range of possible PLL dividers. This patch is an intermediate step towards usage of the Common Clock Framwework for PLL setup, by reworking the code to have common sel_pll() function called by the CEA (HDMI) freq setup and the generic DMT frequencies setup, we should be able to simply call clk_set_rate() on the PLL clock handle in a near future. The CEA (HDMI) and CVBS modes needs very specific clock paths that CCF will never be able to determine by itself, so there is still some work to do for a full handoff to CCF handling the clocks. This setup permits setting non-CEA modes like : - 1600x900-60Hz - 1280x1024-75Hz - 1280x1024-60Hz - 1440x900-60Hz - 1366x768-60Hz - 1280x800-60Hz - 1152x864-75Hz - 1024x768-75Hz - 1024x768-70Hz - 1024x768-60Hz - 832x624-75Hz - 800x600-75Hz - 800x600-72Hz - 800x600-60Hz - 640x480-75Hz - 640x480-73Hz - 640x480-67Hz Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> [narmstrong: fixed trivial checkpatch issues] Link: https://patchwork.freedesktop.org/patch/msgid/1531726814-14638-1-git-send-email-narmstrong@baylibre.com
82 lines
2.6 KiB
C
82 lines
2.6 KiB
C
/*
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* Copyright (C) 2016 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* Video Encoders
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* - ENCI : Interlace Video Encoder
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* - ENCI_DVI : Interlace Video Encoder for DVI/HDMI
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* - ENCP : Progressive Video Encoder
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*/
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#ifndef __MESON_VENC_H
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#define __MESON_VENC_H
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enum {
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MESON_VENC_MODE_NONE = 0,
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MESON_VENC_MODE_CVBS_PAL,
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MESON_VENC_MODE_CVBS_NTSC,
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MESON_VENC_MODE_HDMI,
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};
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struct meson_cvbs_enci_mode {
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unsigned int mode_tag;
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unsigned int hso_begin; /* HSO begin position */
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unsigned int hso_end; /* HSO end position */
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unsigned int vso_even; /* VSO even line */
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unsigned int vso_odd; /* VSO odd line */
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unsigned int macv_max_amp; /* Macrovision max amplitude */
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unsigned int video_prog_mode;
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unsigned int video_mode;
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unsigned int sch_adjust;
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unsigned int yc_delay;
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unsigned int pixel_start;
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unsigned int pixel_end;
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unsigned int top_field_line_start;
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unsigned int top_field_line_end;
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unsigned int bottom_field_line_start;
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unsigned int bottom_field_line_end;
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unsigned int video_saturation;
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unsigned int video_contrast;
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unsigned int video_brightness;
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unsigned int video_hue;
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unsigned int analog_sync_adj;
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};
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/* HDMI Clock parameters */
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enum drm_mode_status
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meson_venc_hdmi_supported_mode(const struct drm_display_mode *mode);
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bool meson_venc_hdmi_supported_vic(int vic);
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bool meson_venc_hdmi_venc_repeat(int vic);
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/* CVBS Timings and Parameters */
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extern struct meson_cvbs_enci_mode meson_cvbs_enci_pal;
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extern struct meson_cvbs_enci_mode meson_cvbs_enci_ntsc;
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void meson_venci_cvbs_mode_set(struct meson_drm *priv,
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struct meson_cvbs_enci_mode *mode);
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void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic,
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struct drm_display_mode *mode);
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unsigned int meson_venci_get_field(struct meson_drm *priv);
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void meson_venc_enable_vsync(struct meson_drm *priv);
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void meson_venc_disable_vsync(struct meson_drm *priv);
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void meson_venc_init(struct meson_drm *priv);
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#endif /* __MESON_VENC_H */
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