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f050fe7a91
Currently we BUG() if we see a HSR.EC value we don't recognise. As configurable disables/enables are added to the architecture (controlled by RES1/RES0 bits respectively), with associated synchronous exceptions, it may be possible for a guest to trigger exceptions with classes that we don't recognise. While we can't service these exceptions in a manner useful to the guest, we can avoid bringing down the host. Per ARM DDI 0406C.c, all currently unallocated HSR EC encodings are reserved, and per ARM DDI 0487A.k_iss10775, page G6-4395, EC values within the range 0x00 - 0x2c are reserved for future use with synchronous exceptions, and EC values within the range 0x2d - 0x3f may be used for either synchronous or asynchronous exceptions. The patch makes KVM handle any unknown EC by injecting an UNDEFINED exception into the guest, with a corresponding (ratelimited) warning in the host dmesg. We could later improve on this with with a new (opt-in) exit to the host userspace. Cc: Dave Martin <dave.martin@arm.com> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
170 lines
4.4 KiB
C
170 lines
4.4 KiB
C
/*
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Author: Christoffer Dall <c.dall@virtualopensystems.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <asm/kvm_emulate.h>
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#include <asm/kvm_coproc.h>
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#include <asm/kvm_mmu.h>
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#include <asm/kvm_psci.h>
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#include <trace/events/kvm.h>
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#include "trace.h"
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typedef int (*exit_handle_fn)(struct kvm_vcpu *, struct kvm_run *);
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static int handle_hvc(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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int ret;
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trace_kvm_hvc(*vcpu_pc(vcpu), *vcpu_reg(vcpu, 0),
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kvm_vcpu_hvc_get_imm(vcpu));
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vcpu->stat.hvc_exit_stat++;
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ret = kvm_psci_call(vcpu);
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if (ret < 0) {
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kvm_inject_undefined(vcpu);
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return 1;
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}
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return ret;
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}
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static int handle_smc(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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kvm_inject_undefined(vcpu);
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return 1;
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}
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/**
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* kvm_handle_wfx - handle a WFI or WFE instructions trapped in guests
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* @vcpu: the vcpu pointer
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* @run: the kvm_run structure pointer
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*
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* WFE: Yield the CPU and come back to this vcpu when the scheduler
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* decides to.
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* WFI: Simply call kvm_vcpu_block(), which will halt execution of
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* world-switches and schedule other host processes until there is an
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* incoming IRQ or FIQ to the VM.
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*/
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static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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if (kvm_vcpu_get_hsr(vcpu) & HSR_WFI_IS_WFE) {
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trace_kvm_wfx(*vcpu_pc(vcpu), true);
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vcpu->stat.wfe_exit_stat++;
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kvm_vcpu_on_spin(vcpu);
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} else {
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trace_kvm_wfx(*vcpu_pc(vcpu), false);
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vcpu->stat.wfi_exit_stat++;
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kvm_vcpu_block(vcpu);
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}
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kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
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return 1;
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}
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static int kvm_handle_unknown_ec(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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u32 hsr = kvm_vcpu_get_hsr(vcpu);
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kvm_pr_unimpl("Unknown exception class: hsr: %#08x\n",
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hsr);
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kvm_inject_undefined(vcpu);
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return 1;
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}
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static exit_handle_fn arm_exit_handlers[] = {
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[0 ... HSR_EC_MAX] = kvm_handle_unknown_ec,
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[HSR_EC_WFI] = kvm_handle_wfx,
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[HSR_EC_CP15_32] = kvm_handle_cp15_32,
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[HSR_EC_CP15_64] = kvm_handle_cp15_64,
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[HSR_EC_CP14_MR] = kvm_handle_cp14_access,
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[HSR_EC_CP14_LS] = kvm_handle_cp14_load_store,
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[HSR_EC_CP14_64] = kvm_handle_cp14_access,
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[HSR_EC_CP_0_13] = kvm_handle_cp_0_13_access,
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[HSR_EC_CP10_ID] = kvm_handle_cp10_id,
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[HSR_EC_HVC] = handle_hvc,
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[HSR_EC_SMC] = handle_smc,
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[HSR_EC_IABT] = kvm_handle_guest_abort,
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[HSR_EC_DABT] = kvm_handle_guest_abort,
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};
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static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu)
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{
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u8 hsr_ec = kvm_vcpu_trap_get_class(vcpu);
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return arm_exit_handlers[hsr_ec];
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}
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/*
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* Return > 0 to return to guest, < 0 on error, 0 (and set exit_reason) on
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* proper exit to userspace.
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*/
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int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
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int exception_index)
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{
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exit_handle_fn exit_handler;
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if (ARM_ABORT_PENDING(exception_index)) {
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u8 hsr_ec = kvm_vcpu_trap_get_class(vcpu);
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/*
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* HVC/SMC already have an adjusted PC, which we need
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* to correct in order to return to after having
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* injected the abort.
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*/
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if (hsr_ec == HSR_EC_HVC || hsr_ec == HSR_EC_SMC) {
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u32 adj = kvm_vcpu_trap_il_is32bit(vcpu) ? 4 : 2;
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*vcpu_pc(vcpu) -= adj;
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}
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kvm_inject_vabt(vcpu);
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return 1;
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}
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exception_index = ARM_EXCEPTION_CODE(exception_index);
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switch (exception_index) {
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case ARM_EXCEPTION_IRQ:
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return 1;
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case ARM_EXCEPTION_HVC:
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/*
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* See ARM ARM B1.14.1: "Hyp traps on instructions
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* that fail their condition code check"
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*/
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if (!kvm_condition_valid(vcpu)) {
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kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
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return 1;
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}
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exit_handler = kvm_get_exit_handler(vcpu);
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return exit_handler(vcpu, run);
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case ARM_EXCEPTION_DATA_ABORT:
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kvm_inject_vabt(vcpu);
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return 1;
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default:
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kvm_pr_unimpl("Unsupported exception type: %d",
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exception_index);
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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return 0;
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}
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}
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