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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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6b243fcfb5
This changes the way that we support the new ISA v3.00 HPTE format. Instead of adapting everything that uses HPTE values to handle either the old format or the new format, depending on which CPU we are on, we now convert explicitly between old and new formats if necessary in the low-level routines that actually access HPTEs in memory. This limits the amount of code that needs to know about the new format and makes the conversions explicit. This is OK because the old format contains all the information that is in the new format. This also fixes operation under a hypervisor, because the H_ENTER hypercall (and other hypercalls that deal with HPTEs) will continue to require the HPTE value to be supplied in the old format. At present the kernel will not boot in HPT mode on POWER9 under a hypervisor. This fixes and partially reverts commit50de596de8
("powerpc/mm/hash: Add support for Power9 Hash", 2016-04-29). Fixes:50de596de8
("powerpc/mm/hash: Add support for Power9 Hash") Signed-off-by: Paul Mackerras <paulus@ozlabs.org> Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
799 lines
20 KiB
C
799 lines
20 KiB
C
/*
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* pSeries_lpar.c
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* Copyright (C) 2001 Todd Inglett, IBM Corporation
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*
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* pSeries LPAR support.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/* Enables debugging of low-level hash table routines - careful! */
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#undef DEBUG
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#include <linux/kernel.h>
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#include <linux/dma-mapping.h>
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#include <linux/console.h>
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#include <linux/export.h>
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#include <linux/jump_label.h>
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#include <asm/processor.h>
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#include <asm/mmu.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/machdep.h>
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#include <asm/mmu_context.h>
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#include <asm/iommu.h>
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#include <asm/tlbflush.h>
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#include <asm/tlb.h>
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#include <asm/prom.h>
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#include <asm/cputable.h>
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#include <asm/udbg.h>
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#include <asm/smp.h>
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#include <asm/trace.h>
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#include <asm/firmware.h>
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#include <asm/plpar_wrappers.h>
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#include <asm/kexec.h>
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#include <asm/fadump.h>
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#include <asm/asm-prototypes.h>
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#include "pseries.h"
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/* Flag bits for H_BULK_REMOVE */
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#define HBR_REQUEST 0x4000000000000000UL
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#define HBR_RESPONSE 0x8000000000000000UL
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#define HBR_END 0xc000000000000000UL
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#define HBR_AVPN 0x0200000000000000UL
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#define HBR_ANDCOND 0x0100000000000000UL
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/* in hvCall.S */
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EXPORT_SYMBOL(plpar_hcall);
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EXPORT_SYMBOL(plpar_hcall9);
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EXPORT_SYMBOL(plpar_hcall_norets);
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void vpa_init(int cpu)
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{
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int hwcpu = get_hard_smp_processor_id(cpu);
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unsigned long addr;
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long ret;
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struct paca_struct *pp;
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struct dtl_entry *dtl;
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/*
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* The spec says it "may be problematic" if CPU x registers the VPA of
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* CPU y. We should never do that, but wail if we ever do.
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*/
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WARN_ON(cpu != smp_processor_id());
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if (cpu_has_feature(CPU_FTR_ALTIVEC))
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lppaca_of(cpu).vmxregs_in_use = 1;
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if (cpu_has_feature(CPU_FTR_ARCH_207S))
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lppaca_of(cpu).ebb_regs_in_use = 1;
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addr = __pa(&lppaca_of(cpu));
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ret = register_vpa(hwcpu, addr);
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if (ret) {
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pr_err("WARNING: VPA registration for cpu %d (hw %d) of area "
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"%lx failed with %ld\n", cpu, hwcpu, addr, ret);
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return;
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}
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#ifdef CONFIG_PPC_STD_MMU_64
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/*
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* PAPR says this feature is SLB-Buffer but firmware never
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* reports that. All SPLPAR support SLB shadow buffer.
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*/
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if (!radix_enabled() && firmware_has_feature(FW_FEATURE_SPLPAR)) {
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addr = __pa(paca[cpu].slb_shadow_ptr);
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ret = register_slb_shadow(hwcpu, addr);
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if (ret)
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pr_err("WARNING: SLB shadow buffer registration for "
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"cpu %d (hw %d) of area %lx failed with %ld\n",
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cpu, hwcpu, addr, ret);
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}
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#endif /* CONFIG_PPC_STD_MMU_64 */
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/*
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* Register dispatch trace log, if one has been allocated.
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*/
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pp = &paca[cpu];
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dtl = pp->dispatch_log;
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if (dtl) {
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pp->dtl_ridx = 0;
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pp->dtl_curr = dtl;
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lppaca_of(cpu).dtl_idx = 0;
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/* hypervisor reads buffer length from this field */
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dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
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ret = register_dtl(hwcpu, __pa(dtl));
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if (ret)
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pr_err("WARNING: DTL registration of cpu %d (hw %d) "
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"failed with %ld\n", smp_processor_id(),
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hwcpu, ret);
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lppaca_of(cpu).dtl_enable_mask = 2;
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}
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}
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#ifdef CONFIG_PPC_STD_MMU_64
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static long pSeries_lpar_hpte_insert(unsigned long hpte_group,
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unsigned long vpn, unsigned long pa,
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unsigned long rflags, unsigned long vflags,
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int psize, int apsize, int ssize)
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{
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unsigned long lpar_rc;
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unsigned long flags;
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unsigned long slot;
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unsigned long hpte_v, hpte_r;
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if (!(vflags & HPTE_V_BOLTED))
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pr_devel("hpte_insert(group=%lx, vpn=%016lx, "
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"pa=%016lx, rflags=%lx, vflags=%lx, psize=%d)\n",
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hpte_group, vpn, pa, rflags, vflags, psize);
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hpte_v = hpte_encode_v(vpn, psize, apsize, ssize) | vflags | HPTE_V_VALID;
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hpte_r = hpte_encode_r(pa, psize, apsize) | rflags;
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if (!(vflags & HPTE_V_BOLTED))
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pr_devel(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
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/* Now fill in the actual HPTE */
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/* Set CEC cookie to 0 */
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/* Zero page = 0 */
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/* I-cache Invalidate = 0 */
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/* I-cache synchronize = 0 */
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/* Exact = 0 */
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flags = 0;
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if (firmware_has_feature(FW_FEATURE_XCMO) && !(hpte_r & HPTE_R_N))
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flags |= H_COALESCE_CAND;
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lpar_rc = plpar_pte_enter(flags, hpte_group, hpte_v, hpte_r, &slot);
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if (unlikely(lpar_rc == H_PTEG_FULL)) {
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if (!(vflags & HPTE_V_BOLTED))
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pr_devel(" full\n");
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return -1;
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}
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/*
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* Since we try and ioremap PHBs we don't own, the pte insert
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* will fail. However we must catch the failure in hash_page
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* or we will loop forever, so return -2 in this case.
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*/
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if (unlikely(lpar_rc != H_SUCCESS)) {
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if (!(vflags & HPTE_V_BOLTED))
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pr_devel(" lpar err %ld\n", lpar_rc);
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return -2;
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}
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if (!(vflags & HPTE_V_BOLTED))
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pr_devel(" -> slot: %lu\n", slot & 7);
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/* Because of iSeries, we have to pass down the secondary
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* bucket bit here as well
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*/
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return (slot & 7) | (!!(vflags & HPTE_V_SECONDARY) << 3);
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}
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static DEFINE_SPINLOCK(pSeries_lpar_tlbie_lock);
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static long pSeries_lpar_hpte_remove(unsigned long hpte_group)
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{
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unsigned long slot_offset;
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unsigned long lpar_rc;
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int i;
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unsigned long dummy1, dummy2;
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/* pick a random slot to start at */
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slot_offset = mftb() & 0x7;
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for (i = 0; i < HPTES_PER_GROUP; i++) {
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/* don't remove a bolted entry */
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lpar_rc = plpar_pte_remove(H_ANDCOND, hpte_group + slot_offset,
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(0x1UL << 4), &dummy1, &dummy2);
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if (lpar_rc == H_SUCCESS)
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return i;
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/*
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* The test for adjunct partition is performed before the
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* ANDCOND test. H_RESOURCE may be returned, so we need to
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* check for that as well.
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*/
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BUG_ON(lpar_rc != H_NOT_FOUND && lpar_rc != H_RESOURCE);
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slot_offset++;
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slot_offset &= 0x7;
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}
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return -1;
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}
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static void pSeries_lpar_hptab_clear(void)
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{
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unsigned long size_bytes = 1UL << ppc64_pft_size;
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unsigned long hpte_count = size_bytes >> 4;
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struct {
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unsigned long pteh;
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unsigned long ptel;
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} ptes[4];
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long lpar_rc;
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unsigned long i, j;
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/* Read in batches of 4,
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* invalidate only valid entries not in the VRMA
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* hpte_count will be a multiple of 4
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*/
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for (i = 0; i < hpte_count; i += 4) {
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lpar_rc = plpar_pte_read_4_raw(0, i, (void *)ptes);
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if (lpar_rc != H_SUCCESS)
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continue;
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for (j = 0; j < 4; j++){
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if ((ptes[j].pteh & HPTE_V_VRMA_MASK) ==
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HPTE_V_VRMA_MASK)
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continue;
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if (ptes[j].pteh & HPTE_V_VALID)
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plpar_pte_remove_raw(0, i + j, 0,
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&(ptes[j].pteh), &(ptes[j].ptel));
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}
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}
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#ifdef __LITTLE_ENDIAN__
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/*
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* Reset exceptions to big endian.
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*
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* FIXME this is a hack for kexec, we need to reset the exception
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* endian before starting the new kernel and this is a convenient place
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* to do it.
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*
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* This is also called on boot when a fadump happens. In that case we
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* must not change the exception endian mode.
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*/
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if (firmware_has_feature(FW_FEATURE_SET_MODE) && !is_fadump_active())
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pseries_big_endian_exceptions();
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#endif
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}
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/*
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* NOTE: for updatepp ops we are fortunate that the linux "newpp" bits and
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* the low 3 bits of flags happen to line up. So no transform is needed.
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* We can probably optimize here and assume the high bits of newpp are
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* already zero. For now I am paranoid.
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*/
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static long pSeries_lpar_hpte_updatepp(unsigned long slot,
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unsigned long newpp,
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unsigned long vpn,
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int psize, int apsize,
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int ssize, unsigned long inv_flags)
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{
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unsigned long lpar_rc;
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unsigned long flags = (newpp & 7) | H_AVPN;
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unsigned long want_v;
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want_v = hpte_encode_avpn(vpn, psize, ssize);
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pr_devel(" update: avpnv=%016lx, hash=%016lx, f=%lx, psize: %d ...",
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want_v, slot, flags, psize);
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lpar_rc = plpar_pte_protect(flags, slot, want_v);
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if (lpar_rc == H_NOT_FOUND) {
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pr_devel("not found !\n");
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return -1;
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}
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pr_devel("ok\n");
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BUG_ON(lpar_rc != H_SUCCESS);
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return 0;
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}
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static long __pSeries_lpar_hpte_find(unsigned long want_v, unsigned long hpte_group)
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{
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long lpar_rc;
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unsigned long i, j;
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struct {
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unsigned long pteh;
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unsigned long ptel;
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} ptes[4];
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for (i = 0; i < HPTES_PER_GROUP; i += 4, hpte_group += 4) {
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lpar_rc = plpar_pte_read_4(0, hpte_group, (void *)ptes);
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if (lpar_rc != H_SUCCESS)
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continue;
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for (j = 0; j < 4; j++) {
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if (HPTE_V_COMPARE(ptes[j].pteh, want_v) &&
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(ptes[j].pteh & HPTE_V_VALID))
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return i + j;
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}
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}
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return -1;
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}
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static long pSeries_lpar_hpte_find(unsigned long vpn, int psize, int ssize)
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{
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long slot;
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unsigned long hash;
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unsigned long want_v;
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unsigned long hpte_group;
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hash = hpt_hash(vpn, mmu_psize_defs[psize].shift, ssize);
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want_v = hpte_encode_avpn(vpn, psize, ssize);
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/* Bolted entries are always in the primary group */
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hpte_group = (hash & htab_hash_mask) * HPTES_PER_GROUP;
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slot = __pSeries_lpar_hpte_find(want_v, hpte_group);
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if (slot < 0)
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return -1;
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return hpte_group + slot;
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}
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static void pSeries_lpar_hpte_updateboltedpp(unsigned long newpp,
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unsigned long ea,
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int psize, int ssize)
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{
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unsigned long vpn;
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unsigned long lpar_rc, slot, vsid, flags;
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vsid = get_kernel_vsid(ea, ssize);
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vpn = hpt_vpn(ea, vsid, ssize);
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slot = pSeries_lpar_hpte_find(vpn, psize, ssize);
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BUG_ON(slot == -1);
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flags = newpp & 7;
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lpar_rc = plpar_pte_protect(flags, slot, 0);
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BUG_ON(lpar_rc != H_SUCCESS);
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}
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static void pSeries_lpar_hpte_invalidate(unsigned long slot, unsigned long vpn,
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int psize, int apsize,
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int ssize, int local)
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{
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unsigned long want_v;
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unsigned long lpar_rc;
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unsigned long dummy1, dummy2;
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pr_devel(" inval : slot=%lx, vpn=%016lx, psize: %d, local: %d\n",
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slot, vpn, psize, local);
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want_v = hpte_encode_avpn(vpn, psize, ssize);
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lpar_rc = plpar_pte_remove(H_AVPN, slot, want_v, &dummy1, &dummy2);
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if (lpar_rc == H_NOT_FOUND)
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return;
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BUG_ON(lpar_rc != H_SUCCESS);
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}
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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/*
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* Limit iterations holding pSeries_lpar_tlbie_lock to 3. We also need
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* to make sure that we avoid bouncing the hypervisor tlbie lock.
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*/
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#define PPC64_HUGE_HPTE_BATCH 12
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static void __pSeries_lpar_hugepage_invalidate(unsigned long *slot,
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unsigned long *vpn, int count,
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int psize, int ssize)
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{
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unsigned long param[PLPAR_HCALL9_BUFSIZE];
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int i = 0, pix = 0, rc;
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unsigned long flags = 0;
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int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
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if (lock_tlbie)
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spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
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for (i = 0; i < count; i++) {
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if (!firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
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pSeries_lpar_hpte_invalidate(slot[i], vpn[i], psize, 0,
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ssize, 0);
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} else {
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param[pix] = HBR_REQUEST | HBR_AVPN | slot[i];
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param[pix+1] = hpte_encode_avpn(vpn[i], psize, ssize);
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pix += 2;
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if (pix == 8) {
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rc = plpar_hcall9(H_BULK_REMOVE, param,
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param[0], param[1], param[2],
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param[3], param[4], param[5],
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param[6], param[7]);
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BUG_ON(rc != H_SUCCESS);
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pix = 0;
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}
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}
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}
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if (pix) {
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param[pix] = HBR_END;
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rc = plpar_hcall9(H_BULK_REMOVE, param, param[0], param[1],
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param[2], param[3], param[4], param[5],
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param[6], param[7]);
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BUG_ON(rc != H_SUCCESS);
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}
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if (lock_tlbie)
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spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags);
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}
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static void pSeries_lpar_hugepage_invalidate(unsigned long vsid,
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unsigned long addr,
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unsigned char *hpte_slot_array,
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int psize, int ssize, int local)
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{
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int i, index = 0;
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unsigned long s_addr = addr;
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unsigned int max_hpte_count, valid;
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unsigned long vpn_array[PPC64_HUGE_HPTE_BATCH];
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unsigned long slot_array[PPC64_HUGE_HPTE_BATCH];
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unsigned long shift, hidx, vpn = 0, hash, slot;
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shift = mmu_psize_defs[psize].shift;
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max_hpte_count = 1U << (PMD_SHIFT - shift);
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for (i = 0; i < max_hpte_count; i++) {
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valid = hpte_valid(hpte_slot_array, i);
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if (!valid)
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continue;
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hidx = hpte_hash_index(hpte_slot_array, i);
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/* get the vpn */
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addr = s_addr + (i * (1ul << shift));
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vpn = hpt_vpn(addr, vsid, ssize);
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hash = hpt_hash(vpn, shift, ssize);
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if (hidx & _PTEIDX_SECONDARY)
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hash = ~hash;
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slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
|
|
slot += hidx & _PTEIDX_GROUP_IX;
|
|
|
|
slot_array[index] = slot;
|
|
vpn_array[index] = vpn;
|
|
if (index == PPC64_HUGE_HPTE_BATCH - 1) {
|
|
/*
|
|
* Now do a bluk invalidate
|
|
*/
|
|
__pSeries_lpar_hugepage_invalidate(slot_array,
|
|
vpn_array,
|
|
PPC64_HUGE_HPTE_BATCH,
|
|
psize, ssize);
|
|
index = 0;
|
|
} else
|
|
index++;
|
|
}
|
|
if (index)
|
|
__pSeries_lpar_hugepage_invalidate(slot_array, vpn_array,
|
|
index, psize, ssize);
|
|
}
|
|
#else
|
|
static void pSeries_lpar_hugepage_invalidate(unsigned long vsid,
|
|
unsigned long addr,
|
|
unsigned char *hpte_slot_array,
|
|
int psize, int ssize, int local)
|
|
{
|
|
WARN(1, "%s called without THP support\n", __func__);
|
|
}
|
|
#endif
|
|
|
|
static int pSeries_lpar_hpte_removebolted(unsigned long ea,
|
|
int psize, int ssize)
|
|
{
|
|
unsigned long vpn;
|
|
unsigned long slot, vsid;
|
|
|
|
vsid = get_kernel_vsid(ea, ssize);
|
|
vpn = hpt_vpn(ea, vsid, ssize);
|
|
|
|
slot = pSeries_lpar_hpte_find(vpn, psize, ssize);
|
|
if (slot == -1)
|
|
return -ENOENT;
|
|
|
|
/*
|
|
* lpar doesn't use the passed actual page size
|
|
*/
|
|
pSeries_lpar_hpte_invalidate(slot, vpn, psize, 0, ssize, 0);
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Take a spinlock around flushes to avoid bouncing the hypervisor tlbie
|
|
* lock.
|
|
*/
|
|
static void pSeries_lpar_flush_hash_range(unsigned long number, int local)
|
|
{
|
|
unsigned long vpn;
|
|
unsigned long i, pix, rc;
|
|
unsigned long flags = 0;
|
|
struct ppc64_tlb_batch *batch = this_cpu_ptr(&ppc64_tlb_batch);
|
|
int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
|
|
unsigned long param[PLPAR_HCALL9_BUFSIZE];
|
|
unsigned long hash, index, shift, hidx, slot;
|
|
real_pte_t pte;
|
|
int psize, ssize;
|
|
|
|
if (lock_tlbie)
|
|
spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
|
|
|
|
psize = batch->psize;
|
|
ssize = batch->ssize;
|
|
pix = 0;
|
|
for (i = 0; i < number; i++) {
|
|
vpn = batch->vpn[i];
|
|
pte = batch->pte[i];
|
|
pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) {
|
|
hash = hpt_hash(vpn, shift, ssize);
|
|
hidx = __rpte_to_hidx(pte, index);
|
|
if (hidx & _PTEIDX_SECONDARY)
|
|
hash = ~hash;
|
|
slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
|
|
slot += hidx & _PTEIDX_GROUP_IX;
|
|
if (!firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
|
|
/*
|
|
* lpar doesn't use the passed actual page size
|
|
*/
|
|
pSeries_lpar_hpte_invalidate(slot, vpn, psize,
|
|
0, ssize, local);
|
|
} else {
|
|
param[pix] = HBR_REQUEST | HBR_AVPN | slot;
|
|
param[pix+1] = hpte_encode_avpn(vpn, psize,
|
|
ssize);
|
|
pix += 2;
|
|
if (pix == 8) {
|
|
rc = plpar_hcall9(H_BULK_REMOVE, param,
|
|
param[0], param[1], param[2],
|
|
param[3], param[4], param[5],
|
|
param[6], param[7]);
|
|
BUG_ON(rc != H_SUCCESS);
|
|
pix = 0;
|
|
}
|
|
}
|
|
} pte_iterate_hashed_end();
|
|
}
|
|
if (pix) {
|
|
param[pix] = HBR_END;
|
|
rc = plpar_hcall9(H_BULK_REMOVE, param, param[0], param[1],
|
|
param[2], param[3], param[4], param[5],
|
|
param[6], param[7]);
|
|
BUG_ON(rc != H_SUCCESS);
|
|
}
|
|
|
|
if (lock_tlbie)
|
|
spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags);
|
|
}
|
|
|
|
static int __init disable_bulk_remove(char *str)
|
|
{
|
|
if (strcmp(str, "off") == 0 &&
|
|
firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
|
|
printk(KERN_INFO "Disabling BULK_REMOVE firmware feature");
|
|
powerpc_firmware_features &= ~FW_FEATURE_BULK_REMOVE;
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
__setup("bulk_remove=", disable_bulk_remove);
|
|
|
|
void __init hpte_init_pseries(void)
|
|
{
|
|
mmu_hash_ops.hpte_invalidate = pSeries_lpar_hpte_invalidate;
|
|
mmu_hash_ops.hpte_updatepp = pSeries_lpar_hpte_updatepp;
|
|
mmu_hash_ops.hpte_updateboltedpp = pSeries_lpar_hpte_updateboltedpp;
|
|
mmu_hash_ops.hpte_insert = pSeries_lpar_hpte_insert;
|
|
mmu_hash_ops.hpte_remove = pSeries_lpar_hpte_remove;
|
|
mmu_hash_ops.hpte_removebolted = pSeries_lpar_hpte_removebolted;
|
|
mmu_hash_ops.flush_hash_range = pSeries_lpar_flush_hash_range;
|
|
mmu_hash_ops.hpte_clear_all = pSeries_lpar_hptab_clear;
|
|
mmu_hash_ops.hugepage_invalidate = pSeries_lpar_hugepage_invalidate;
|
|
}
|
|
|
|
#ifdef CONFIG_PPC_SMLPAR
|
|
#define CMO_FREE_HINT_DEFAULT 1
|
|
static int cmo_free_hint_flag = CMO_FREE_HINT_DEFAULT;
|
|
|
|
static int __init cmo_free_hint(char *str)
|
|
{
|
|
char *parm;
|
|
parm = strstrip(str);
|
|
|
|
if (strcasecmp(parm, "no") == 0 || strcasecmp(parm, "off") == 0) {
|
|
printk(KERN_INFO "cmo_free_hint: CMO free page hinting is not active.\n");
|
|
cmo_free_hint_flag = 0;
|
|
return 1;
|
|
}
|
|
|
|
cmo_free_hint_flag = 1;
|
|
printk(KERN_INFO "cmo_free_hint: CMO free page hinting is active.\n");
|
|
|
|
if (strcasecmp(parm, "yes") == 0 || strcasecmp(parm, "on") == 0)
|
|
return 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
__setup("cmo_free_hint=", cmo_free_hint);
|
|
|
|
static void pSeries_set_page_state(struct page *page, int order,
|
|
unsigned long state)
|
|
{
|
|
int i, j;
|
|
unsigned long cmo_page_sz, addr;
|
|
|
|
cmo_page_sz = cmo_get_page_size();
|
|
addr = __pa((unsigned long)page_address(page));
|
|
|
|
for (i = 0; i < (1 << order); i++, addr += PAGE_SIZE) {
|
|
for (j = 0; j < PAGE_SIZE; j += cmo_page_sz)
|
|
plpar_hcall_norets(H_PAGE_INIT, state, addr + j, 0);
|
|
}
|
|
}
|
|
|
|
void arch_free_page(struct page *page, int order)
|
|
{
|
|
if (radix_enabled())
|
|
return;
|
|
if (!cmo_free_hint_flag || !firmware_has_feature(FW_FEATURE_CMO))
|
|
return;
|
|
|
|
pSeries_set_page_state(page, order, H_PAGE_SET_UNUSED);
|
|
}
|
|
EXPORT_SYMBOL(arch_free_page);
|
|
|
|
#endif /* CONFIG_PPC_SMLPAR */
|
|
#endif /* CONFIG_PPC_STD_MMU_64 */
|
|
|
|
#ifdef CONFIG_TRACEPOINTS
|
|
#ifdef HAVE_JUMP_LABEL
|
|
struct static_key hcall_tracepoint_key = STATIC_KEY_INIT;
|
|
|
|
void hcall_tracepoint_regfunc(void)
|
|
{
|
|
static_key_slow_inc(&hcall_tracepoint_key);
|
|
}
|
|
|
|
void hcall_tracepoint_unregfunc(void)
|
|
{
|
|
static_key_slow_dec(&hcall_tracepoint_key);
|
|
}
|
|
#else
|
|
/*
|
|
* We optimise our hcall path by placing hcall_tracepoint_refcount
|
|
* directly in the TOC so we can check if the hcall tracepoints are
|
|
* enabled via a single load.
|
|
*/
|
|
|
|
/* NB: reg/unreg are called while guarded with the tracepoints_mutex */
|
|
extern long hcall_tracepoint_refcount;
|
|
|
|
void hcall_tracepoint_regfunc(void)
|
|
{
|
|
hcall_tracepoint_refcount++;
|
|
}
|
|
|
|
void hcall_tracepoint_unregfunc(void)
|
|
{
|
|
hcall_tracepoint_refcount--;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Since the tracing code might execute hcalls we need to guard against
|
|
* recursion. One example of this are spinlocks calling H_YIELD on
|
|
* shared processor partitions.
|
|
*/
|
|
static DEFINE_PER_CPU(unsigned int, hcall_trace_depth);
|
|
|
|
|
|
void __trace_hcall_entry(unsigned long opcode, unsigned long *args)
|
|
{
|
|
unsigned long flags;
|
|
unsigned int *depth;
|
|
|
|
/*
|
|
* We cannot call tracepoints inside RCU idle regions which
|
|
* means we must not trace H_CEDE.
|
|
*/
|
|
if (opcode == H_CEDE)
|
|
return;
|
|
|
|
local_irq_save(flags);
|
|
|
|
depth = this_cpu_ptr(&hcall_trace_depth);
|
|
|
|
if (*depth)
|
|
goto out;
|
|
|
|
(*depth)++;
|
|
preempt_disable();
|
|
trace_hcall_entry(opcode, args);
|
|
(*depth)--;
|
|
|
|
out:
|
|
local_irq_restore(flags);
|
|
}
|
|
|
|
void __trace_hcall_exit(long opcode, unsigned long retval,
|
|
unsigned long *retbuf)
|
|
{
|
|
unsigned long flags;
|
|
unsigned int *depth;
|
|
|
|
if (opcode == H_CEDE)
|
|
return;
|
|
|
|
local_irq_save(flags);
|
|
|
|
depth = this_cpu_ptr(&hcall_trace_depth);
|
|
|
|
if (*depth)
|
|
goto out;
|
|
|
|
(*depth)++;
|
|
trace_hcall_exit(opcode, retval, retbuf);
|
|
preempt_enable();
|
|
(*depth)--;
|
|
|
|
out:
|
|
local_irq_restore(flags);
|
|
}
|
|
#endif
|
|
|
|
/**
|
|
* h_get_mpp
|
|
* H_GET_MPP hcall returns info in 7 parms
|
|
*/
|
|
int h_get_mpp(struct hvcall_mpp_data *mpp_data)
|
|
{
|
|
int rc;
|
|
unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
|
|
|
|
rc = plpar_hcall9(H_GET_MPP, retbuf);
|
|
|
|
mpp_data->entitled_mem = retbuf[0];
|
|
mpp_data->mapped_mem = retbuf[1];
|
|
|
|
mpp_data->group_num = (retbuf[2] >> 2 * 8) & 0xffff;
|
|
mpp_data->pool_num = retbuf[2] & 0xffff;
|
|
|
|
mpp_data->mem_weight = (retbuf[3] >> 7 * 8) & 0xff;
|
|
mpp_data->unallocated_mem_weight = (retbuf[3] >> 6 * 8) & 0xff;
|
|
mpp_data->unallocated_entitlement = retbuf[3] & 0xffffffffffffUL;
|
|
|
|
mpp_data->pool_size = retbuf[4];
|
|
mpp_data->loan_request = retbuf[5];
|
|
mpp_data->backing_mem = retbuf[6];
|
|
|
|
return rc;
|
|
}
|
|
EXPORT_SYMBOL(h_get_mpp);
|
|
|
|
int h_get_mpp_x(struct hvcall_mpp_x_data *mpp_x_data)
|
|
{
|
|
int rc;
|
|
unsigned long retbuf[PLPAR_HCALL9_BUFSIZE] = { 0 };
|
|
|
|
rc = plpar_hcall9(H_GET_MPP_X, retbuf);
|
|
|
|
mpp_x_data->coalesced_bytes = retbuf[0];
|
|
mpp_x_data->pool_coalesced_bytes = retbuf[1];
|
|
mpp_x_data->pool_purr_cycles = retbuf[2];
|
|
mpp_x_data->pool_spurr_cycles = retbuf[3];
|
|
|
|
return rc;
|
|
}
|