mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 13:20:23 +07:00
220069945b
Add support for the memory mapped timers by filling in the read/write functions and adding some parsing code. Note that we only register one clocksource, preferring the cp15 based clocksource over the mmio one. To keep things simple we register one global clockevent. This covers the case of UP and SMP systems with only mmio hardware and systems where the memory mapped timers are used as the broadcast timer in low power modes. The DT binding allows for per-CPU memory mapped timers in case we want to support that in the future, but the code isn't added here. We also don't do much for hypervisor support, although it should be possible to support it by searching for at least two frames where one frame has the virtual capability and then updating KVM timers to support it. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Marc Zyngier <Marc.Zyngier@arm.com> Cc: Rob Herring <robherring2@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Mark Rutland <mark.rutland@arm.com>
62 lines
1.5 KiB
C
62 lines
1.5 KiB
C
/*
|
|
* Copyright (C) 2012 ARM Ltd.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
#ifndef __CLKSOURCE_ARM_ARCH_TIMER_H
|
|
#define __CLKSOURCE_ARM_ARCH_TIMER_H
|
|
|
|
#include <linux/clocksource.h>
|
|
#include <linux/types.h>
|
|
|
|
#define ARCH_TIMER_CTRL_ENABLE (1 << 0)
|
|
#define ARCH_TIMER_CTRL_IT_MASK (1 << 1)
|
|
#define ARCH_TIMER_CTRL_IT_STAT (1 << 2)
|
|
|
|
enum arch_timer_reg {
|
|
ARCH_TIMER_REG_CTRL,
|
|
ARCH_TIMER_REG_TVAL,
|
|
};
|
|
|
|
#define ARCH_TIMER_PHYS_ACCESS 0
|
|
#define ARCH_TIMER_VIRT_ACCESS 1
|
|
#define ARCH_TIMER_MEM_PHYS_ACCESS 2
|
|
#define ARCH_TIMER_MEM_VIRT_ACCESS 3
|
|
|
|
#ifdef CONFIG_ARM_ARCH_TIMER
|
|
|
|
extern u32 arch_timer_get_rate(void);
|
|
extern u64 (*arch_timer_read_counter)(void);
|
|
extern struct timecounter *arch_timer_get_timecounter(void);
|
|
|
|
#else
|
|
|
|
static inline u32 arch_timer_get_rate(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline u64 arch_timer_read_counter(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline struct timecounter *arch_timer_get_timecounter(void)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
#endif
|
|
|
|
#endif
|