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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 675 mass ave cambridge ma 02139 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 441 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc) Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190520071858.739733335@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
69 lines
2.3 KiB
C
69 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* PTP 1588 clock using the IXP46X
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*
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* Copyright (C) 2010 OMICRON electronics GmbH
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*/
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#ifndef _IXP46X_TS_H_
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#define _IXP46X_TS_H_
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#define DEFAULT_ADDEND 0xF0000029
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#define TICKS_NS_SHIFT 4
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struct ixp46x_channel_ctl {
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u32 ch_control; /* 0x40 Time Synchronization Channel Control */
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u32 ch_event; /* 0x44 Time Synchronization Channel Event */
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u32 tx_snap_lo; /* 0x48 Transmit Snapshot Low Register */
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u32 tx_snap_hi; /* 0x4C Transmit Snapshot High Register */
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u32 rx_snap_lo; /* 0x50 Receive Snapshot Low Register */
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u32 rx_snap_hi; /* 0x54 Receive Snapshot High Register */
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u32 src_uuid_lo; /* 0x58 Source UUID0 Low Register */
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u32 src_uuid_hi; /* 0x5C Sequence Identifier/Source UUID0 High */
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};
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struct ixp46x_ts_regs {
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u32 control; /* 0x00 Time Sync Control Register */
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u32 event; /* 0x04 Time Sync Event Register */
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u32 addend; /* 0x08 Time Sync Addend Register */
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u32 accum; /* 0x0C Time Sync Accumulator Register */
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u32 test; /* 0x10 Time Sync Test Register */
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u32 unused; /* 0x14 */
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u32 rsystime_lo; /* 0x18 RawSystemTime_Low Register */
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u32 rsystime_hi; /* 0x1C RawSystemTime_High Register */
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u32 systime_lo; /* 0x20 SystemTime_Low Register */
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u32 systime_hi; /* 0x24 SystemTime_High Register */
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u32 trgt_lo; /* 0x28 TargetTime_Low Register */
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u32 trgt_hi; /* 0x2C TargetTime_High Register */
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u32 asms_lo; /* 0x30 Auxiliary Slave Mode Snapshot Low */
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u32 asms_hi; /* 0x34 Auxiliary Slave Mode Snapshot High */
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u32 amms_lo; /* 0x38 Auxiliary Master Mode Snapshot Low */
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u32 amms_hi; /* 0x3C Auxiliary Master Mode Snapshot High */
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struct ixp46x_channel_ctl channel[3];
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};
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/* 0x00 Time Sync Control Register Bits */
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#define TSCR_AMM (1<<3)
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#define TSCR_ASM (1<<2)
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#define TSCR_TTM (1<<1)
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#define TSCR_RST (1<<0)
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/* 0x04 Time Sync Event Register Bits */
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#define TSER_SNM (1<<3)
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#define TSER_SNS (1<<2)
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#define TTIPEND (1<<1)
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/* 0x40 Time Synchronization Channel Control Register Bits */
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#define MASTER_MODE (1<<0)
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#define TIMESTAMP_ALL (1<<1)
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/* 0x44 Time Synchronization Channel Event Register Bits */
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#define TX_SNAPSHOT_LOCKED (1<<0)
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#define RX_SNAPSHOT_LOCKED (1<<1)
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/* The ptp_ixp46x module will set this variable */
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extern int ixp46x_phc_index;
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#endif
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