mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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fced80c735
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
248 lines
5.3 KiB
C
248 lines
5.3 KiB
C
/*
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* arch/arm/mach-ixp2000/pci.c
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*
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* PCI routines for IXDP2400/IXDP2800 boards
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*
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* Original Author: Naeem Afzal <naeem.m.afzal@intel.com>
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* Maintained by: Deepak Saxena <dsaxena@plexity.net>
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*
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* Copyright 2002 Intel Corp.
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <asm/irq.h>
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#include <asm/system.h>
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#include <mach/hardware.h>
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#include <asm/mach/pci.h>
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static volatile int pci_master_aborts = 0;
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static int clear_master_aborts(void);
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u32 *
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ixp2000_pci_config_addr(unsigned int bus_nr, unsigned int devfn, int where)
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{
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u32 *paddress;
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if (PCI_SLOT(devfn) > 7)
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return 0;
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/* Must be dword aligned */
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where &= ~3;
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/*
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* For top bus, generate type 0, else type 1
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*/
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if (!bus_nr) {
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/* only bits[23:16] are used for IDSEL */
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paddress = (u32 *) (IXP2000_PCI_CFG0_VIRT_BASE
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| (1 << (PCI_SLOT(devfn) + 16))
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| (PCI_FUNC(devfn) << 8) | where);
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} else {
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paddress = (u32 *) (IXP2000_PCI_CFG1_VIRT_BASE
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| (bus_nr << 16)
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| (PCI_SLOT(devfn) << 11)
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| (PCI_FUNC(devfn) << 8) | where);
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}
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return paddress;
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}
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/*
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* Mask table, bits to mask for quantity of size 1, 2 or 4 bytes.
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* 0 and 3 are not valid indexes...
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*/
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static u32 bytemask[] = {
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/*0*/ 0,
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/*1*/ 0xff,
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/*2*/ 0xffff,
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/*3*/ 0,
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/*4*/ 0xffffffff,
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};
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int ixp2000_pci_read_config(struct pci_bus *bus, unsigned int devfn, int where,
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int size, u32 *value)
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{
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u32 n;
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u32 *addr;
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n = where % 4;
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addr = ixp2000_pci_config_addr(bus->number, devfn, where);
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if (!addr)
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return PCIBIOS_DEVICE_NOT_FOUND;
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pci_master_aborts = 0;
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*value = (*addr >> (8*n)) & bytemask[size];
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if (pci_master_aborts) {
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pci_master_aborts = 0;
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*value = 0xffffffff;
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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/*
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* We don't do error checks by calling clear_master_aborts() b/c the
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* assumption is that the caller did a read first to make sure a device
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* exists.
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*/
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int ixp2000_pci_write_config(struct pci_bus *bus, unsigned int devfn, int where,
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int size, u32 value)
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{
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u32 mask;
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u32 *addr;
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u32 temp;
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mask = ~(bytemask[size] << ((where % 0x4) * 8));
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addr = ixp2000_pci_config_addr(bus->number, devfn, where);
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if (!addr)
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return PCIBIOS_DEVICE_NOT_FOUND;
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temp = (u32) (value) << ((where % 0x4) * 8);
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*addr = (*addr & mask) | temp;
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clear_master_aborts();
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return PCIBIOS_SUCCESSFUL;
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}
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static struct pci_ops ixp2000_pci_ops = {
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.read = ixp2000_pci_read_config,
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.write = ixp2000_pci_write_config
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};
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struct pci_bus *ixp2000_pci_scan_bus(int nr, struct pci_sys_data *sysdata)
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{
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return pci_scan_bus(sysdata->busnr, &ixp2000_pci_ops, sysdata);
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}
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int ixp2000_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
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{
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volatile u32 temp;
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unsigned long flags;
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pci_master_aborts = 1;
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local_irq_save(flags);
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temp = *(IXP2000_PCI_CONTROL);
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if (temp & ((1 << 8) | (1 << 5))) {
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ixp2000_reg_wrb(IXP2000_PCI_CONTROL, temp);
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}
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temp = *(IXP2000_PCI_CMDSTAT);
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if (temp & (1 << 29)) {
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while (temp & (1 << 29)) {
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ixp2000_reg_write(IXP2000_PCI_CMDSTAT, temp);
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temp = *(IXP2000_PCI_CMDSTAT);
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}
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}
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local_irq_restore(flags);
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/*
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* If it was an imprecise abort, then we need to correct the
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* return address to be _after_ the instruction.
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*/
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if (fsr & (1 << 10))
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regs->ARM_pc += 4;
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return 0;
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}
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int
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clear_master_aborts(void)
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{
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volatile u32 temp;
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unsigned long flags;
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local_irq_save(flags);
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temp = *(IXP2000_PCI_CONTROL);
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if (temp & ((1 << 8) | (1 << 5))) {
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ixp2000_reg_wrb(IXP2000_PCI_CONTROL, temp);
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}
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temp = *(IXP2000_PCI_CMDSTAT);
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if (temp & (1 << 29)) {
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while (temp & (1 << 29)) {
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ixp2000_reg_write(IXP2000_PCI_CMDSTAT, temp);
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temp = *(IXP2000_PCI_CMDSTAT);
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}
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}
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local_irq_restore(flags);
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return 0;
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}
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void __init
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ixp2000_pci_preinit(void)
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{
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#ifndef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO
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/*
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* Configure the PCI unit to properly byteswap I/O transactions,
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* and verify that it worked.
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*/
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ixp2000_reg_write(IXP2000_PCI_CONTROL,
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(*IXP2000_PCI_CONTROL | PCI_CONTROL_IEE));
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if ((*IXP2000_PCI_CONTROL & PCI_CONTROL_IEE) == 0)
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panic("IXP2000: PCI I/O is broken on this ixp model, and "
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"the needed workaround has not been configured in");
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#endif
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hook_fault_code(16+6, ixp2000_pci_abort_handler, SIGBUS,
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"PCI config cycle to non-existent device");
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}
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/*
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* IXP2000 systems often have large resource requirements, so we just
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* use our own resource space.
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*/
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static struct resource ixp2000_pci_mem_space = {
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.start = 0xe0000000,
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.end = 0xffffffff,
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.flags = IORESOURCE_MEM,
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.name = "PCI Mem Space"
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};
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static struct resource ixp2000_pci_io_space = {
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.start = 0x00010000,
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.end = 0x0001ffff,
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.flags = IORESOURCE_IO,
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.name = "PCI I/O Space"
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};
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int ixp2000_pci_setup(int nr, struct pci_sys_data *sys)
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{
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if (nr >= 1)
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return 0;
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sys->resource[0] = &ixp2000_pci_io_space;
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sys->resource[1] = &ixp2000_pci_mem_space;
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sys->resource[2] = NULL;
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return 1;
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}
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