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42847d8a1f
Add support for the msgqueue firmware used to process PMU commands for gm20b. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
207 lines
6.9 KiB
C
207 lines
6.9 KiB
C
/*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __NVKM_CORE_FALCON_MSGQUEUE_H
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#define __NVKM_CORE_FALCON_MSGQUEUE_H
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#include <core/msgqueue.h>
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/*
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* The struct nvkm_msgqueue (named so for lack of better candidate) manages
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* a firmware (typically, NVIDIA signed firmware) running under a given falcon.
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*
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* Such firmwares expect to receive commands (through one or several command
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* queues) and will reply to such command by sending messages (using one
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* message queue).
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*
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* Each firmware can support one or several units - ACR for managing secure
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* falcons, PMU for power management, etc. A unit can be seen as a class to
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* which command can be sent.
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*
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* One usage example would be to send a command to the SEC falcon to ask it to
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* reset a secure falcon. The SEC falcon will receive the command, process it,
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* and send a message to signal success or failure. Only when the corresponding
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* message is received can the requester assume the request has been processed.
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*
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* Since we expect many variations between the firmwares NVIDIA will release
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* across GPU generations, this library is built in a very modular way. Message
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* formats and queues details (such as number of usage) are left to
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* specializations of struct nvkm_msgqueue, while the functions in msgqueue.c
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* take care of posting commands and processing messages in a fashion that is
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* universal.
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*
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*/
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enum msgqueue_msg_priority {
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MSGQUEUE_MSG_PRIORITY_HIGH,
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MSGQUEUE_MSG_PRIORITY_LOW,
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};
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/**
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* struct nvkm_msgqueue_hdr - header for all commands/messages
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* @unit_id: id of firmware using receiving the command/sending the message
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* @size: total size of command/message
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* @ctrl_flags: type of command/message
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* @seq_id: used to match a message from its corresponding command
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*/
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struct nvkm_msgqueue_hdr {
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u8 unit_id;
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u8 size;
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u8 ctrl_flags;
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u8 seq_id;
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};
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/**
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* struct nvkm_msgqueue_msg - base message.
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*
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* This is just a header and a message (or command) type. Useful when
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* building command-specific structures.
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*/
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struct nvkm_msgqueue_msg {
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struct nvkm_msgqueue_hdr hdr;
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u8 msg_type;
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};
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struct nvkm_msgqueue;
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typedef void
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(*nvkm_msgqueue_callback)(struct nvkm_msgqueue *, struct nvkm_msgqueue_hdr *);
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/**
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* struct nvkm_msgqueue_init_func - msgqueue functions related to initialization
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*
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* @gen_cmdline: build the commandline into a pre-allocated buffer
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* @init_callback: called to process the init message
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*/
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struct nvkm_msgqueue_init_func {
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void (*gen_cmdline)(struct nvkm_msgqueue *, void *);
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int (*init_callback)(struct nvkm_msgqueue *, struct nvkm_msgqueue_hdr *);
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};
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/**
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* struct nvkm_msgqueue_acr_func - msgqueue functions related to ACR
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*
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* @boot_falcon: build and send the command to reset a given falcon
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*/
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struct nvkm_msgqueue_acr_func {
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int (*boot_falcon)(struct nvkm_msgqueue *, enum nvkm_secboot_falcon);
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};
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struct nvkm_msgqueue_func {
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const struct nvkm_msgqueue_init_func *init_func;
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const struct nvkm_msgqueue_acr_func *acr_func;
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void (*dtor)(struct nvkm_msgqueue *);
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struct nvkm_msgqueue_queue *(*cmd_queue)(struct nvkm_msgqueue *,
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enum msgqueue_msg_priority);
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void (*recv)(struct nvkm_msgqueue *queue);
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};
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/**
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* struct nvkm_msgqueue_queue - information about a command or message queue
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*
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* The number of queues is firmware-dependent. All queues must have their
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* information filled by the init message handler.
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*
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* @mutex_lock: to be acquired when the queue is being used
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* @index: physical queue index
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* @offset: DMEM offset where this queue begins
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* @size: size allocated to this queue in DMEM (in bytes)
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* @position: current write position
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* @head_reg: address of the HEAD register for this queue
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* @tail_reg: address of the TAIL register for this queue
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*/
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struct nvkm_msgqueue_queue {
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struct mutex mutex;
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u32 index;
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u32 offset;
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u32 size;
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u32 position;
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u32 head_reg;
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u32 tail_reg;
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};
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/**
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* struct nvkm_msgqueue_seq - keep track of ongoing commands
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*
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* Every time a command is sent, a sequence is assigned to it so the
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* corresponding message can be matched. Upon receiving the message, a callback
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* can be called and/or a completion signaled.
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*
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* @id: sequence ID
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* @state: current state
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* @callback: callback to call upon receiving matching message
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* @completion: completion to signal after callback is called
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*/
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struct nvkm_msgqueue_seq {
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u16 id;
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enum {
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SEQ_STATE_FREE = 0,
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SEQ_STATE_PENDING,
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SEQ_STATE_USED,
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SEQ_STATE_CANCELLED
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} state;
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nvkm_msgqueue_callback callback;
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struct completion *completion;
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};
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/*
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* We can have an arbitrary number of sequences, but realistically we will
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* probably not use that much simultaneously.
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*/
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#define NVKM_MSGQUEUE_NUM_SEQUENCES 16
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/**
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* struct nvkm_msgqueue - manage a command/message based FW on a falcon
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*
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* @falcon: falcon to be managed
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* @func: implementation of the firmware to use
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* @init_msg_received: whether the init message has already been received
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* @init_done: whether all init is complete and commands can be processed
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* @seq_lock: protects seq and seq_tbl
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* @seq: sequences to match commands and messages
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* @seq_tbl: bitmap of sequences currently in use
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*/
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struct nvkm_msgqueue {
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struct nvkm_falcon *falcon;
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const struct nvkm_msgqueue_func *func;
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u32 fw_version;
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bool init_msg_received;
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struct completion init_done;
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struct mutex seq_lock;
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struct nvkm_msgqueue_seq seq[NVKM_MSGQUEUE_NUM_SEQUENCES];
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unsigned long seq_tbl[BITS_TO_LONGS(NVKM_MSGQUEUE_NUM_SEQUENCES)];
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};
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void nvkm_msgqueue_ctor(const struct nvkm_msgqueue_func *, struct nvkm_falcon *,
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struct nvkm_msgqueue *);
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int nvkm_msgqueue_post(struct nvkm_msgqueue *, enum msgqueue_msg_priority,
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struct nvkm_msgqueue_hdr *, nvkm_msgqueue_callback,
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struct completion *, bool);
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void nvkm_msgqueue_process_msgs(struct nvkm_msgqueue *,
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struct nvkm_msgqueue_queue *);
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int msgqueue_0137c63d_new(struct nvkm_falcon *, struct nvkm_msgqueue **);
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#endif
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