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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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6ac2cc209e
On SEC, DMEM is unaccessible by the CPU when the falcon is running in LS mode. This makes communication with the firmware using DMEM impossible. For this purpose, a new kind of memory (EMEM) has been added. It works similarly to DMEM, with the difference that its address space starts at 0x1000000. For this reason, it makes sense to treat it like a special case of DMEM. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
228 lines
5.4 KiB
C
228 lines
5.4 KiB
C
/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "priv.h"
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#include <subdev/mc.h>
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void
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nvkm_falcon_load_imem(struct nvkm_falcon *falcon, void *data, u32 start,
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u32 size, u16 tag, u8 port, bool secure)
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{
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if (secure && !falcon->secret) {
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nvkm_warn(falcon->user,
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"writing with secure tag on a non-secure falcon!\n");
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return;
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}
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falcon->func->load_imem(falcon, data, start, size, tag, port,
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secure);
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}
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void
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nvkm_falcon_load_dmem(struct nvkm_falcon *falcon, void *data, u32 start,
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u32 size, u8 port)
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{
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mutex_lock(&falcon->dmem_mutex);
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falcon->func->load_dmem(falcon, data, start, size, port);
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mutex_unlock(&falcon->dmem_mutex);
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}
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void
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nvkm_falcon_read_dmem(struct nvkm_falcon *falcon, u32 start, u32 size, u8 port,
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void *data)
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{
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mutex_lock(&falcon->dmem_mutex);
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falcon->func->read_dmem(falcon, start, size, port, data);
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mutex_unlock(&falcon->dmem_mutex);
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}
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void
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nvkm_falcon_bind_context(struct nvkm_falcon *falcon, struct nvkm_gpuobj *inst)
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{
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if (!falcon->func->bind_context) {
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nvkm_error(falcon->user,
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"Context binding not supported on this falcon!\n");
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return;
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}
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falcon->func->bind_context(falcon, inst);
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}
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void
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nvkm_falcon_set_start_addr(struct nvkm_falcon *falcon, u32 start_addr)
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{
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falcon->func->set_start_addr(falcon, start_addr);
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}
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void
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nvkm_falcon_start(struct nvkm_falcon *falcon)
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{
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falcon->func->start(falcon);
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}
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int
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nvkm_falcon_enable(struct nvkm_falcon *falcon)
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{
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struct nvkm_device *device = falcon->owner->device;
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enum nvkm_devidx id = falcon->owner->index;
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int ret;
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nvkm_mc_enable(device, id);
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ret = falcon->func->enable(falcon);
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if (ret) {
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nvkm_mc_disable(device, id);
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return ret;
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}
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return 0;
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}
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void
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nvkm_falcon_disable(struct nvkm_falcon *falcon)
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{
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struct nvkm_device *device = falcon->owner->device;
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enum nvkm_devidx id = falcon->owner->index;
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/* already disabled, return or wait_idle will timeout */
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if (!nvkm_mc_enabled(device, id))
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return;
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falcon->func->disable(falcon);
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nvkm_mc_disable(device, id);
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}
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int
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nvkm_falcon_reset(struct nvkm_falcon *falcon)
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{
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nvkm_falcon_disable(falcon);
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return nvkm_falcon_enable(falcon);
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}
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int
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nvkm_falcon_wait_for_halt(struct nvkm_falcon *falcon, u32 ms)
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{
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return falcon->func->wait_for_halt(falcon, ms);
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}
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int
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nvkm_falcon_clear_interrupt(struct nvkm_falcon *falcon, u32 mask)
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{
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return falcon->func->clear_interrupt(falcon, mask);
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}
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void
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nvkm_falcon_put(struct nvkm_falcon *falcon, const struct nvkm_subdev *user)
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{
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if (unlikely(!falcon))
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return;
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mutex_lock(&falcon->mutex);
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if (falcon->user == user) {
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nvkm_debug(falcon->user, "released %s falcon\n", falcon->name);
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falcon->user = NULL;
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}
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mutex_unlock(&falcon->mutex);
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}
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int
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nvkm_falcon_get(struct nvkm_falcon *falcon, const struct nvkm_subdev *user)
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{
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mutex_lock(&falcon->mutex);
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if (falcon->user) {
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nvkm_error(user, "%s falcon already acquired by %s!\n",
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falcon->name, nvkm_subdev_name[falcon->user->index]);
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mutex_unlock(&falcon->mutex);
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return -EBUSY;
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}
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nvkm_debug(user, "acquired %s falcon\n", falcon->name);
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falcon->user = user;
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mutex_unlock(&falcon->mutex);
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return 0;
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}
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void
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nvkm_falcon_ctor(const struct nvkm_falcon_func *func,
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struct nvkm_subdev *subdev, const char *name, u32 addr,
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struct nvkm_falcon *falcon)
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{
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u32 debug_reg;
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u32 reg;
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falcon->func = func;
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falcon->owner = subdev;
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falcon->name = name;
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falcon->addr = addr;
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mutex_init(&falcon->mutex);
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mutex_init(&falcon->dmem_mutex);
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reg = nvkm_falcon_rd32(falcon, 0x12c);
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falcon->version = reg & 0xf;
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falcon->secret = (reg >> 4) & 0x3;
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falcon->code.ports = (reg >> 8) & 0xf;
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falcon->data.ports = (reg >> 12) & 0xf;
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reg = nvkm_falcon_rd32(falcon, 0x108);
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falcon->code.limit = (reg & 0x1ff) << 8;
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falcon->data.limit = (reg & 0x3fe00) >> 1;
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switch (subdev->index) {
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case NVKM_ENGINE_GR:
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debug_reg = 0x0;
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break;
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case NVKM_SUBDEV_PMU:
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debug_reg = 0xc08;
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break;
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case NVKM_ENGINE_NVDEC:
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debug_reg = 0xd00;
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break;
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case NVKM_ENGINE_SEC2:
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debug_reg = 0x408;
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falcon->has_emem = true;
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break;
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default:
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nvkm_warn(subdev, "unsupported falcon %s!\n",
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nvkm_subdev_name[subdev->index]);
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debug_reg = 0;
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break;
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}
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if (debug_reg) {
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u32 val = nvkm_falcon_rd32(falcon, debug_reg);
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falcon->debug = (val >> 20) & 0x1;
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}
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}
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void
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nvkm_falcon_del(struct nvkm_falcon **pfalcon)
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{
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if (*pfalcon) {
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kfree(*pfalcon);
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*pfalcon = NULL;
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}
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}
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