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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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6db92cc9d0
It adds cache-sram support in P1/P2 QorIQ platforms as under: * A small abstraction over powerpc's remote heap allocator * Exports mpc85xx_cache_sram_alloc()/free() APIs * Supports only one contiguous SRAM window * Drivers can do the following in Kconfig to use these APIs "select FSL_85XX_CACHE_SRAM if MPC85xx" * Required SRAM size and the offset where SRAM should be mapped must be provided at kernel command line as : cache-sram-size=<value> cache-sram-offset=<offset> Signed-off-by: Harninder Rai <harninder.rai@freescale.com> Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
160 lines
4.3 KiB
C
160 lines
4.3 KiB
C
/*
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* Copyright 2009-2010 Freescale Semiconductor, Inc.
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*
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* Simple memory allocator abstraction for QorIQ (P1/P2) based Cache-SRAM
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*
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* Author: Vivek Mahajan <vivek.mahajan@freescale.com>
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*
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* This file is derived from the original work done
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* by Sylvain Munaut for the Bestcomm SRAM allocator.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/of_platform.h>
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#include <asm/pgtable.h>
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#include <asm/fsl_85xx_cache_sram.h>
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#include "fsl_85xx_cache_ctlr.h"
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struct mpc85xx_cache_sram *cache_sram;
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void *mpc85xx_cache_sram_alloc(unsigned int size,
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phys_addr_t *phys, unsigned int align)
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{
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unsigned long offset;
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unsigned long flags;
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if (unlikely(cache_sram == NULL))
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return NULL;
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if (!size || (size > cache_sram->size) || (align > cache_sram->size)) {
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pr_err("%s(): size(=%x) or align(=%x) zero or too big\n",
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__func__, size, align);
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return NULL;
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}
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if ((align & (align - 1)) || align <= 1) {
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pr_err("%s(): align(=%x) must be power of two and >1\n",
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__func__, align);
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return NULL;
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}
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spin_lock_irqsave(&cache_sram->lock, flags);
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offset = rh_alloc_align(cache_sram->rh, size, align, NULL);
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spin_unlock_irqrestore(&cache_sram->lock, flags);
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if (IS_ERR_VALUE(offset))
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return NULL;
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*phys = cache_sram->base_phys + offset;
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return (unsigned char *)cache_sram->base_virt + offset;
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}
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EXPORT_SYMBOL(mpc85xx_cache_sram_alloc);
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void mpc85xx_cache_sram_free(void *ptr)
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{
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unsigned long flags;
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BUG_ON(!ptr);
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spin_lock_irqsave(&cache_sram->lock, flags);
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rh_free(cache_sram->rh, ptr - cache_sram->base_virt);
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spin_unlock_irqrestore(&cache_sram->lock, flags);
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}
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EXPORT_SYMBOL(mpc85xx_cache_sram_free);
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int __init instantiate_cache_sram(struct platform_device *dev,
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struct sram_parameters sram_params)
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{
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int ret = 0;
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if (cache_sram) {
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dev_err(&dev->dev, "Already initialized cache-sram\n");
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return -EBUSY;
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}
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cache_sram = kzalloc(sizeof(struct mpc85xx_cache_sram), GFP_KERNEL);
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if (!cache_sram) {
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dev_err(&dev->dev, "Out of memory for cache_sram structure\n");
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return -ENOMEM;
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}
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cache_sram->base_phys = sram_params.sram_offset;
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cache_sram->size = sram_params.sram_size;
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if (!request_mem_region(cache_sram->base_phys, cache_sram->size,
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"fsl_85xx_cache_sram")) {
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dev_err(&dev->dev, "%s: request memory failed\n",
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dev->dev.of_node->full_name);
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ret = -ENXIO;
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goto out_free;
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}
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cache_sram->base_virt = ioremap_flags(cache_sram->base_phys,
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cache_sram->size, _PAGE_COHERENT | PAGE_KERNEL);
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if (!cache_sram->base_virt) {
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dev_err(&dev->dev, "%s: ioremap_flags failed\n",
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dev->dev.of_node->full_name);
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ret = -ENOMEM;
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goto out_release;
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}
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cache_sram->rh = rh_create(sizeof(unsigned int));
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if (IS_ERR(cache_sram->rh)) {
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dev_err(&dev->dev, "%s: Unable to create remote heap\n",
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dev->dev.of_node->full_name);
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ret = PTR_ERR(cache_sram->rh);
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goto out_unmap;
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}
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rh_attach_region(cache_sram->rh, 0, cache_sram->size);
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spin_lock_init(&cache_sram->lock);
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dev_info(&dev->dev, "[base:0x%llx, size:0x%x] configured and loaded\n",
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(unsigned long long)cache_sram->base_phys, cache_sram->size);
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return 0;
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out_unmap:
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iounmap(cache_sram->base_virt);
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out_release:
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release_mem_region(cache_sram->base_phys, cache_sram->size);
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out_free:
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kfree(cache_sram);
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return ret;
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}
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void remove_cache_sram(struct platform_device *dev)
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{
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BUG_ON(!cache_sram);
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rh_detach_region(cache_sram->rh, 0, cache_sram->size);
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rh_destroy(cache_sram->rh);
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iounmap(cache_sram->base_virt);
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release_mem_region(cache_sram->base_phys, cache_sram->size);
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kfree(cache_sram);
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cache_sram = NULL;
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dev_info(&dev->dev, "MPC85xx Cache-SRAM driver unloaded\n");
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}
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